Arithmetic unit sequence control circuit

Claim 1

A DATA PROCESSING SYSTEM INCLUDING AN ARITHMETIC UNIT HAVING A PLURALITY OF OPERATION CONTROLLING INPUTS SELECTIVELY ENERGIZABLE TO DETERMINE FUNCTIONS TO BE PERFORMED THEREIN AND A CONTROL CIRCUIT TO SELECTIVELY ENERGIZE SAID INPUTS TO ENABLE PROCESSING OF DATA WITHIN SAID ARITHMETIC UNIT, SAID CONTROL CIRCUIT COMPRISING A PULSE SOURCE, A CHAIN OF TWO-STATE DEVICES, EACH TWO-STATE DEVICE HAVING A PLURALITY OF INPUTS, AND AN OUTPUT LEAD ENERGIZED WHEN THE DEVICE IS IN A SET CONDITION, A CIRCUIT CONNECTING ALL SAID DEVICES TO SAID PULSE SOURCE WHEREBY EACH PULSE OF SAID PULSE SOURCE WILL PROPAGATE THE SET CONDITION OF A TWO-STATE DEVICE TO THE SUCCEEDING DEVICE OF SAID CHAIN, A PLURALITY OF NORMALLY INACTIVE SWITCHES FOR EACH OUTPUT LEAD, EACH SWITCH HAVING ONE POLE CONNECTED TO ITS OUTPUT LEAD, A PLURALITY OF ACTUATORS, EACH CAPABLE OF ACTIVATING ONE SWITCH IN EACH OUTPUT LEAD, A SET AND CLEAR CIRCUIT FOR EACH TWO-STATE DEVICE, SAID CIRCUIT BEING ACTIVATED TO CAUSE RESETTING OF ANY SET TWO-STATE DEVICE AND TO THEREAFTER ENABLE SETTING OF ITS ASSOCIATED TWO-STATE DEVICE BY A PULSE OF SAID PULSE SOURCE AND CIRCUITS SELECTIVELY CONNECTING THE REMAINING POLES OF SAID SWITCHES TO SAID OPERATION CONTROLLING INPUTS, TO SAID SWITCH ACTUATOR AND TO SAID SET AND CLEAR CIRCUITS WHEREBY EACH SWITCH ACTUATOR CAN SELECT AT LEAST ONE DISTINCT SEQUENCE OF OPERATIONS IN SAID ARITHMETIC UNIT.