Anticoincident pulse responsive circuit comprising logic components

Claim 1

IN PULSE CONTROL APPARATUS OPERATIVE WITH INPUT PULSES SUPPLIED TO FIRST AND SECOND INPUT CIRCUITS, THE COMBINATION OF A FIRST PULSE GENERATOR DEVICE FOR PROVIDING A FIRST OUTPUT PULSE IN RESPONSE TO AN INPUT PULSE BEING SUPPLIED TO SAID FIRST INPUT CIRCUTI, A SECOND PULSE GENERATOR DEVICE FOR PROVIDING A SECOND OUTPUT PULSE IN RESPONSE TO AN INPUT PULSE BEING SUPPLIED TO SAID SECOND INPUT CIRCUIT, A FIRST PULSE GENERATOR DEVICE OPERATIVELY CONNECTED TO SAID FIRST PULSE GENERATOR DEVICE FOR PROVIDING A FIRST DELAYED OUTPUT PULSE FOR EACH OF SAID FIRST OUTPUT PULSES PROVIDED BY SAID FIRST PULSE GENERATOR DEVICE, A SECOND PULSE DELAY DEVICE OPERATIVELY CONNECTED TO SAID ID SECOND PULSE GENERATOR DEVICE FOR PROVIDING A SECOND DELAYED OUTPUT PULSE FOR EACH OF SAID SECOND OUTPUT PULSES PROVIDED BY SAID SECOND PULSE GENERATING DEVICE, AND A PULSE CONTROL DEVICE RESPONSIVE TO SAID FIRST OUTPUT PULSE AND SAID SECOND OUTPUT PULSE FOR PROVIDING A CONTROL PULSE WHEN SAID FIRST OUTPUT PULSE IS SUBSTANTIALLY COINCIDENT RELATIVE TO SAID SECOND OUTPUT PULSE, WITH EACH OF SAID FIRST AND SECOND PULSE DELAY DEVICES BEING RESPONSIVE TO SAID CONTROL PULSE FOR PREVENTING THE PROVISION OF THEIR RESPECTIVE FIRST AND SECOND DELAYED OUTPUT PULSES UPON THE OCCURRENCE OF SAID CONTROL PULSE.