Positive countdown circuit with delayed pulse feedback gating clocked coincident circuit

Claim 1

AN PULSE COUNTDOWN CIRCUIT COMPRISING, BLOCKING OSCILLATOR MEANS FOR GENERATING A PULSE, MEANS FOR PRODUCING A DELAYED PULSE IN RESPONSE TO SAID BLOCKING OSCILLATOR PULSE, THE AMOUNT OF DELAY BEING SUBSTANTIALLY EQUAL TO THE DESIRED PERIOD OF THE COUNTED-DOWN OUTPUT, MEANS TO TRIGGER SAID BLOCKING OSCILLATOR, MEANS FOR APPLYING CLOCK PULSES TO BE COUNTED-DOWN TO SAID MEANS TO TRIGGER, MEANS FOR BLOCKING SAID MEANS TO TRIGGER TO INHIBIT TRIGGEERING OF THE BLOCKING OSCILLATOR EXCEPT IN RESPONSE TO A CLOCK PULSE OCCURRING IN COINCIDENCE WITH A DELAYED PULSE, AND MEANS FOR PROVIDING AN INITIAL SUBSTITUTE DELAYED PLUSE TO INITIATE OPERATION OF THE CIRCUIT FOR SUBSEQUENT RECURRENT OPERATION RESULTANT TO COINCIDENT DELAYED PULSES AND CLOCK PULSES.