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US5281866A Expired / Lapsed US ⏱️ 0.0 years remaining

Reference voltage circuit allowing fast power up from low power standby condition

Assignee: Texas Instruments Tucson Corp
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Filing: 1993-05-25
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Granted: 1994-01-25
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Expires: 2013-05-25
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Abstract

Abstract A reference voltage circuit in an integrated circuit analog-to-digital converter includes a band gap circuit, a first field effect transistor coupling an output conductor of the band gap circuit to a first external bypass capacitor and a non-inverting input of a buffer circuit. A second field effect transistor couples the first conductor to a non-inverting input of the buffer circuit. An output of the buffer circuit is coupled to an inverting input thereof. The first and second field effect transistors are turned on during conversions, during which the first field effect transistor and the first bypass capacitor coacting to filter high frequency noise produced by the band gap circuit to apply a precise reference voltage to the non-inverting input of the buffer circuit. Between conversions, the first and second field effect transistors are turned off to isolate the first bypass capacitor and preserve its charge, so that the first bypass capacitor does not need to be charged up when the first and second field effect transistors are turned back on.

Inventors

  • 👤 Bernd M. Rundel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 15:03
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/462; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/30; H; H03; H03F; H03F1/00; H03F1/30; H03F1/305; H03M; H03M1/00; H03M1/12; H03M1/34

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 239 words
In an integrated circuit analog-to-digital converter, a reference voltage circuit comprising in combination: (a) a band gap circuit having an output conductor and producing thereon a first reference voltage; (b) a first field effect transistor coupling the output conductor of the band gap circuit to a first conductor, the first conductor being coupled to a first external bypass capacitor means; (c) a buffer circuit; (d) a second field effect transistor coupling the first conductor to a non-inverting input of the buffer circuit; (e) means for turning the first and second field effect transistors off when low power standby operation of the analog-to-digital converter is desired to prevent discharging of the first external bypass capacitor and thereby avoid a need to recharge the first external bypass capacitor when the first and second field effect transistors are turned back on, the first field effect transistor and the first bypass capacitor means coacting with output impedance of the band gap circuit when the first and second field effect transistors are on to filter high frequency noise produced on the first reference voltage by the band gap circuit to thereby apply a second reference voltage that is more regulated than the first reference voltage to the non-inverting input of the buffer circuit, the reference voltage circuit replicating the second reference voltage to produce a third reference voltage that is more regulated than the first reference voltage at the output of the buffer circuit.
Claim 2
Dependent Claim 239 words
In an integrated circuit analog-to-digital converter, a reference voltage circuit comprising in combination: (a) a band gap circuit having an output conductor and producing thereon a first reference voltage; (b) a first field effect transistor coupling the output conductor of the band gap circuit to a first conductor, the first conductor being coupled to a first external bypass capacitor means; (c) a buffer circuit; (d) a second field effect transistor coupling the first conductor to a non-inverting input of the buffer circuit; (e) means for turning the first and second field effect transistors off when low power standby operation of the analog-to-digital converter is desired to prevent discharging of the first external bypass capacitor and thereby avoid a need to recharge the first external bypass capacitor when the first and second field effect transistors are turned back on, the first field effect transistor and the first bypass capacitor means coacting with output impedance of the band gap circuit when the first and second field effect transistors are on to filter high frequency noise produced on the first reference voltage by the band gap circuit to thereby apply a second reference voltage that is more regulated than the first reference voltage to the non-inverting input of the buffer circuit, the reference voltage circuit replicating the second reference voltage to produce a third reference voltage that is more regulated than the first reference voltage at the output of the buffer circuit.
Claim 3
Dependent Claim 43 words
In an integrated circuit analog-to-digital converter, the reference voltage circuit of claim 1 wherein the means for turning the first and second field effect transistors off comprises means for turning off the first field effect transistor independently of the second field effect transistor.
Claim 4
Dependent Claim 64 words
In an integrated circuit analog-to-digital converter, the reference voltage circuit of claim 1 including a second bypass capacitor means connected to a second conductor, a third field effect transistor coupling the output of the buffer circuit to the second conductor, and a fourth field effect transistor coupling the second conductor to a third conductor, a fourth reference voltage being produced on the third conductor.
Claim 5
Dependent Claim 49 words
In an integrated circuit analog-to-digital converter, the reference voltage circuit of claim 1 including a laser trimmable resistive divider circuit coupled to the output of the buffer circuit producing an adjusted reference voltage and applying it to a reference voltage terminal of a CDAC capacitor array of the ADC.
Claim 6
Dependent Claim 58 words
In an integrated circuit analog-to-digital converter, the reference voltage circuit of claim 4 wherein the band gap circuit has an output impedance of approximately 3.5 kilohms, and the first bypass capacitor has a capacitance in the range from approximately 1 to 10 microfarads, and the first field effect transistor has an on channel resistance of approximately 25 ohms.
Claim 7
Dependent Claim 28 words
In an integrated circuit analog-to-digital converter, the reference voltage circuit of claim 1 including means for coupling an output of the buffer circuit to an inverting input thereof.
Claim 8
Dependent Claim 242 words
A reference voltage circuit, comprising in combination: (a) a band gap circuit having an output conductor and producing thereon a first reference voltage; (b) a first field effect transistor coupling the output conductor of the band gap circuit to a first conductor, the first conductor being coupled to a first external bypass capacitor means; (c) a buffer circuit; (d) a second field effect transistor coupling the first conductor to a non-inverting input of the buffer circuit; (e) means for turning the first and second field effect transistors off when low power standby operation of a utilization circuit operating in response to the reference voltage circuit is desired to prevent discharging of the first external bypass capacitor and thereby avoid a need to recharge the first external bypass capacitor when the first and second field effect transistors are turned back on, the first field effect transistor and the first external bypass capacitor means coacting with output impedance of the band gap circuit when the first and second field effect transistors are on to filter high frequency noise produced on the first reference voltage by the band gap circuit to thereby apply a second reference voltage that is more regulated than the first reference voltage to the non-inverting input of the buffer circuit, the reference voltage circuit replicating the second reference voltage to produce a third reference voltage that is more regulated than the first reference voltage at the output of the buffer circuit.
Claim 9
Dependent Claim 242 words
A reference voltage circuit, comprising in combination: (a) a band gap circuit having an output conductor and producing thereon a first reference voltage; (b) a first field effect transistor coupling the output conductor of the band gap circuit to a first conductor, the first conductor being coupled to a first external bypass capacitor means; (c) a buffer circuit; (d) a second field effect transistor coupling the first conductor to a non-inverting input of the buffer circuit; (e) means for turning the first and second field effect transistors off when low power standby operation of a utilization circuit operating in response to the reference voltage circuit is desired to prevent discharging of the first external bypass capacitor and thereby avoid a need to recharge the first external bypass capacitor when the first and second field effect transistors are turned back on, the first field effect transistor and the first external bypass capacitor means coacting with output impedance of the band gap circuit when the first and second field effect transistors are on to filter high frequency noise produced on the first reference voltage by the band gap circuit to thereby apply a second reference voltage that is more regulated than the first reference voltage to the non-inverting input of the buffer circuit, the reference voltage circuit replicating the second reference voltage to produce a third reference voltage that is more regulated than the first reference voltage at the output of the buffer circuit.
Claim 10
Dependent Claim 24 words
The reference voltage circuit of claim 7 including means for turning off the first field effect transistor independently of the second field effect transistor.
Claim 11
Dependent Claim 59 words
The reference voltage circuit of claim 7 including a second bypass capacitor means connected to a second conductor means, a third field effect transistor coupling the output of the buffer circuit to the second conductor, and a fourth field effect transistor coupling the second conductor to a third conductor, a fourth reference voltage being produced on the third conductor.
Claim 12
Dependent Claim 38 words
The reference voltage circuit of claim 7 including a laser trimmable resistive divider circuit coupled to the output of the buffer circuit producing an adjusted reference voltage and applying it to a reference voltage terminal of utilization circuit.
Claim 13
Independent Claim 262 words
A method of producing a precise, low noise reference voltage with low average power dissipation, comprising the steps of: (a) powering up a band gap circuit having an output conductor and producing thereon a first reference voltage; (b) coupling the output conductor of the band gap circuit to a first conductor by turning on a first field effect transistor, the first conductor being coupled to a first external bypass capacitor, and simultaneously filtering high frequency noise produced on the first reference voltage by the band gap circuit to thereby produce a second reference voltage that is more regulated than the first reference voltage on the first conductor; (c) coupling the first conductor to a non-inverting input of a buffer circuit means of a second field effect transistor to thereby produce the second reference voltage on the non-inverting input of the buffer circuit, the buffer circuit means replicating the second reference voltage to produce a third reference voltage that is more regulated than the first reference voltage; (d) turning the first and second field effect transistors on during powered up operations by a utilization circuit, to cause the channel resistance of the first field transistor and the output impedance of the band gap circuit to coact with the first bypass capacitor to produce the filtering; (e) turning the first and second field effect transistors off to begin a power down operation and to prevent discharge of the first bypass capacitor and thereby avoid a need to recharge the first bypass capacitor when the first and second field effect transistors are turned back on.
Claim 14
Independent Claim 262 words
A method of producing a precise, low noise reference voltage with low average power dissipation, comprising the steps of: (a) powering up a band gap circuit having an output conductor and producing thereon a first reference voltage; (b) coupling the output conductor of the band gap circuit to a first conductor by turning on a first field effect transistor, the first conductor being coupled to a first external bypass capacitor, and simultaneously filtering high frequency noise produced on the first reference voltage by the band gap circuit to thereby produce a second reference voltage that is more regulated than the first reference voltage on the first conductor; (c) coupling the first conductor to a non-inverting input of a buffer circuit means of a second field effect transistor to thereby produce the second reference voltage on the non-inverting input of the buffer circuit, the buffer circuit means replicating the second reference voltage to produce a third reference voltage that is more regulated than the first reference voltage; (d) turning the first and second field effect transistors on during powered up operations by a utilization circuit, to cause the channel resistance of the first field transistor and the output impedance of the band gap circuit to coact with the first bypass capacitor to produce the filtering; (e) turning the first and second field effect transistors off to begin a power down operation and to prevent discharge of the first bypass capacitor and thereby avoid a need to recharge the first bypass capacitor when the first and second field effect transistors are turned back on.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-01-24 1997-07-26 1998-01-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-01-24 2001-07-26 2002-01-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-01-24 2005-07-26 2006-01-25 $7700.00 Window Closed / Lapsed

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