Mobile telephone system with intermittent control of receiver components in standby state

Claim 1

A mobile telephone system comprising: signal receiver means for demodulating a received modulated signal, including an analog demodulating portion for demodulating a received modulated high-frequency signal into a baseband signal and a digital demodulating portion for demodulating said baseband signal into a digital signal, to output an audio signal or a control signal, said control signal being receivable only during intermittent intervals of a continuous stand-by period of said system; frequency synthesizer means, including a phase-locked loop, for generating a demodulating frequency signal and outputting the frequency signal to said signal receiver means; controller means for generating and outputting an intermittent signal synchronous with said control signal during said continuous stand-by period of said system, said controller means including a timer and program means for detecting a synchronization signal included in said control signal; said program means including timer setting means for setting up in said timer a first timer value corresponding to a period of said control signal during which a necessary signal is included in said control signal, at a time when a second timer value set in said timer has expired, said second timer value corresponding to a period of said control signal during which an unnecessary signal is included in said control signal; intermittent signal output means for rendering said intermittent signal nonactive when said first timer value has expired, and rendering said intermittent signal active when said second timer value has expired; a power source for applying a voltage continuously to at least said controller means; and a power switch responsive to said intermittent signal for outputting an intermittent voltage derived from said power source to said signal receiver means and components of said frequency synthesizer means other said phase-locked loop, such that power is switched on and off synchronously with intermittent reception of said control signal over said continuous stand-by period, and a continuous voltage is provided to said phase-locked loop to maintain frequency stability in said frequency synthesizer means regardless of the state of said intermittent signal.