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US4900691A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabrication for optical storage apparatus

Assignee: Kanegafuchi Chemical Industry Co Ltd
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Filing: 1989-06-09
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Granted: 1990-02-13
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Expires: 2009-06-09
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Abstract

Abstract An optical memory comprising a doping modulated multilayer made of amorphous semiconductor, and at least two electrodes, one of the electrodes being transparent and the multilayer being sandwiched between two electrodes. Data is written by increasing the electrical conductance of the amorphous semiconductor by irradiating it is light. Data is erased by the application of a bias voltage to the electrodes and also by irradiating the amorphous semiconductor with light having photon energy of approximately half or less of the optical energy band gap of the amorphous semiconductor. The memory effect can be maintained for a week or longer, and the memory can be erased without heating the memory device, whereby the lifetime of the device is lengthened.

Inventors

  • 👤 Takada Jun

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 03:28
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/005; G11C11/00; G11C11/21; G11C11/34; G11C11/39; G11C13/00; G11C13/04

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 69 words
A method of fabrication of an optical memory comprising the steps of: forming at least one electrode on a substrate; forming a reversible, doping modulated multilayer of amorphous semiconductor such that a first side is in electrical contact with the electrode; and forming at least one electrode on the semiconductor such that the electrode is in electrical contact with a second side of the semiconductor opposite the first side.
Claim 2
Independent Claim 69 words
A method of fabrication of an optical memory comprising the steps of: forming at least one electrode on a substrate; forming a reversible, doping modulated multilayer of amorphous semiconductor such that a first side is in electrical contact with the electrode; and forming at least one electrode on the semiconductor such that the electrode is in electrical contact with a second side of the semiconductor opposite the first side.
Claim 3
Dependent Claim 28 words
The method of fabrication of claim 1 further comprising the step of forming a transparent protective interface between the amorphous semiconductor and at least one of the electrodes.
Claim 4
Dependent Claim 14 words
The method of fabrication of claim 1 wherein all of said electrodes are transparent.
Claim 5
Dependent Claim 24 words
The method of fabrication of claim 1 wherein a plurality of electrodes are configured to form multiple memory cells on a single semiconductor element.
Claim 6
Dependent Claim 26 words
The method of fabrication of claim 1 wherein the step of forming at least one electrode on a substrate comprises forming a highly reflective metal electrode.
Claim 7
Dependent Claim 15 words
The method of fabrication of claim 1 wherein the amorphous semiconductor is a superlattice structure.
Claim 8
Dependent Claim 25 words
The method of fabrication of claim 1 wherein the multilayer amorphous semiconductor comprises hydrogen and at least one element of the Periodic Table, Column IVA.
Claim 9
Dependent Claim 27 words
The method of fabrication of claim 1 further comprising the step of forming a conductive anti-diffusion layer interposed between at least one electrode and the amorphous semiconductor.
Claim 10
Dependent Claim 27 words
The method of fabrication of claim 8 wherein the conductive anti-diffusion layer is transparent and is interposed between the amorphous semiconductor and at least one non-transparent electrode.
Claim 11
Dependent Claim 28 words
The method of fabrication of claim 1 wherein the multilayer amorphous semiconductor is formed with an alternating p-type and n-type layer configuration of pnpn . . . pnp.
Claim 12
Dependent Claim 19 words
The method of fabrication of claim 10 wherein the amorphous semiconductor is formed of between 3 and 1000 layers.
Claim 13
Dependent Claim 21 words
The method of fabrication of claim 10 wherein the p-type and n-type layers are between 200 Angstroms and 1000 Angstroms thick.
Claim 14
Dependent Claim 22 words
The method of fabrication of claim 12 wherein the multilayer amorphous semiconductor has a total thickness between 1000 Angstroms and 10 microns.
Claim 15
Dependent Claim 28 words
The method of fabrication of claim 1 wherein the multilayer amorphous semiconductor is formed with a p-type, i-type and n-type layer configuration of pinpin . . . pinp.
Claim 16
Dependent Claim 20 words
The method of fabrication of claim 14 wherein the multilayer amorphous semiconductor is formed of between 5 and 1000 layers.
Claim 17
Dependent Claim 33 words
The method of fabrication of claim 14 wherein the p-type and n-type layers are between 300 Angstroms and 1000 Angstroms thick and the i-type layer is between 3 Angstroms and 1000 Angstroms thick.
Claim 18
Dependent Claim 22 words
The method of fabrication of claim 16 wherein the multilayer amorphous semiconductor has a total thickness between 1000 Angstroms and 100,000 Angstroms.

References Cited (Backward Citations)

US3530441A Cited
US4597162A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-02-12 1993-08-14 1994-02-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-02-12 1997-08-14 1998-02-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-02-12 2001-08-14 2002-02-13 $7700.00 Window Closed / Lapsed

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