US4745378A
Expired / Lapsed
US
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Surface acoustic wave device
Assignee: Faurecia Clarion Electronics Co Ltd
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Filing: 1987-09-18
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Granted: 1988-05-17
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Expires: 2007-09-18
Abstract
Abstract The surface acoustic wave device includes a plurality of output gate electrodes provided between two signal input transducers on a piezoelectric layer on a semiconductor substrate, so that each output gate electrode receives a bias voltage unique to it and supplies an output signal based on the unique bias voltage.
Inventors
- 👤 Teruo Niitsuma
- 👤 Takeshi Okamoto
- 👤 Shoichi Minagawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 11:37
CPC Classifications
H; H03; H03H; H03H9/00; H03H9/46; H03H9/64; H03H9/6403; H03H9/02; H03H9/02535; H03H9/02543; H03H9/02566
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
197 words
A surface acoustic wave device comprising: a semiconductor substrate; a piezoelectric film provided on one surface of said substrate; two signal input transducers which are provided at spaced locations on said piezoelectric film and can each enter a signal thereinto; a plurality of electrically separate output gate electrodes provided on said piezoelectric film between said input transducers, said substrate having a plurality of interaction regions which are each associated with a respective said gate electrode; bias voltage applying means connected directly to each said output gate electrode for applying to each of said output gate electrodes a respective bias voltage independently selected to optimize a capacity-to-voltage characteristic in the associated interaction region of said substrate, said bias voltage applying means including a plurality of independently variable bias voltage sources which are each connected to a respective said output gate electrode; and output signal extracting means for extracting a respective output signal from each of said output gate electrodes, said output signal extracting means including a plurality of DC blocking capacitors which each have one end connected to a respective one of said output gate electrodes, each said output signal being extracted through a respective said blocking capacitor.
Claim 2
Dependent Claim
197 words
A surface acoustic wave device comprising: a semiconductor substrate; a piezoelectric film provided on one surface of said substrate; two signal input transducers which are provided at spaced locations on said piezoelectric film and can each enter a signal thereinto; a plurality of electrically separate output gate electrodes provided on said piezoelectric film between said input transducers, said substrate having a plurality of interaction regions which are each associated with a respective said gate electrode; bias voltage applying means connected directly to each said output gate electrode for applying to each of said output gate electrodes a respective bias voltage independently selected to optimize a capacity-to-voltage characteristic in the associated interaction region of said substrate, said bias voltage applying means including a plurality of independently variable bias voltage sources which are each connected to a respective said output gate electrode; and output signal extracting means for extracting a respective output signal from each of said output gate electrodes, said output signal extracting means including a plurality of DC blocking capacitors which each have one end connected to a respective one of said output gate electrodes, each said output signal being extracted through a respective said blocking capacitor.
Claim 3
Dependent Claim
48 words
A surface acoustic wave device of claim 1 wherein said output signal extracting means includes a dielectric film provided on said output gate electrodes and said blocking capacitors include a plurality of signal extracting electrodes provided on said dielectric film at locations aligned with respective said gate electrodes.
Claim 4
Dependent Claim
30 words
A surface acoustic wave device of claim 2, including a matching circuit having an input, each of said signal extracting electrodes being connected to said input of said matching circuit.
Claim 5
Dependent Claim
24 words
A surface acoustic wave device of claim 1, wherein said output signal extracting means is directly electrically connected to each said output gate electrode.
Claim 6
Dependent Claim
45 words
A surface acoustic wave device of claim 4, wherein said output signal extracting means includes a matching circuit having an input, each said capacitor having a further end which is remote from said one end and is connected to said input of said matching circuit.
Claim 7
Dependent Claim
46 words
A surface acoustic wave device of claim 4, including a plurality of matching circuits which each have an input, each said capacitor having a further end which is remote from said one end and which is connected to the input of a respective said matching circuit.
Claim 8
Dependent Claim
197 words
A surface acoustic wave device, comprising: a semiconductor substrate having first and second surfaces on opposite sides thereof; an insulation film provided on said first surface of said substrate; a piezoelectric film provided on said insulation film; two signal input transducers provided at spaced positions on said piezoelectric film; a ground electrode provided on said second surface of said semiconductor substrate and connected to ground; a plurality of signal output gate electrodes provided on said piezoelectric film between said two signal input transducers; optimum bias applying means connected to said output gate electrodes for supplying each said output gate electrode with an optimum d.c. bias voltage which optimizes the capacitance-voltage characteristic of a respective region under such output gate electrode where an interaction occurs between surface acoustic waves and a depletion layer provided along said first surface of said substrate; and output signal extracting means for extracting a respective output signal from each said output gate electrode, said output signal extracting means including a plurality of d.c. blocking capacitors which each have a terminal connected to a respective said output gate electrode so that each said output signal is extracted through a respective said d.c. blocking capacitor.
Claim 9
Dependent Claim
197 words
A surface acoustic wave device, comprising: a semiconductor substrate having first and second surfaces on opposite sides thereof; an insulation film provided on said first surface of said substrate; a piezoelectric film provided on said insulation film; two signal input transducers provided at spaced positions on said piezoelectric film; a ground electrode provided on said second surface of said semiconductor substrate and connected to ground; a plurality of signal output gate electrodes provided on said piezoelectric film between said two signal input transducers; optimum bias applying means connected to said output gate electrodes for supplying each said output gate electrode with an optimum d.c. bias voltage which optimizes the capacitance-voltage characteristic of a respective region under such output gate electrode where an interaction occurs between surface acoustic waves and a depletion layer provided along said first surface of said substrate; and output signal extracting means for extracting a respective output signal from each said output gate electrode, said output signal extracting means including a plurality of d.c. blocking capacitors which each have a terminal connected to a respective said output gate electrode so that each said output signal is extracted through a respective said d.c. blocking capacitor.
Claim 10
Dependent Claim
38 words
A surface acoustic wave device of claim 7, wherein said optimum bias applying means includes a plurality of variable d.c. bias sources which are each connected to a respective said output gate electrode and which are adjustable independently.
Claim 11
Dependent Claim
49 words
A surface acoustic wave device of claim 7, wherein said optimum bias applying means includes a resistance layer and d.c. bias source means connected to said resistance layer, said resistance layer having a plurality of bias voltage extracting taps which are each connected to a respective said gate electrode.
References Cited (Backward Citations)
US4328473A
Cited
US4473767A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1991-05-17 | 1991-11-16 | 1992-05-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-05-17 | 1995-11-16 | 1996-05-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-05-17 | 1999-11-16 | 2000-05-17 | $7700.00 | Window Closed / Lapsed |