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US4742353A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital processor for radar signals which can perform adaptive suppression of clutter means of a parametric estimator

Assignee: Leonardo SpA
•
Filing: 1985-07-03
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Granted: 1988-05-03
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Expires: 2005-07-03
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Abstract

Abstract A digital processor for radar signals which can perform adaptive suppression of the disturbance clutter and enhancement of the useful signal of given Doppler frequency. It can approximate the principle of operation of the optimum processor, which is that processor which maximizes the signal-to-noise ratio. Such processor can also cancel, in a adaptive manner, a clutter component having an approximately Gaussian power spectrum.

Inventors

  • 👤 Egidio D'Addio
  • 👤 Alfonso Farina

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 02:21
CPC Classifications
G; G01; G01S; G01S7/00; G01S7/02; G01S7/28; G01S7/285; G01S7/292; G01S7/2923; G01S13/00; G01S13/02; G01S13/50; G01S13/52; G01S13/522; G01S13/524; G01S13/5244

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 76 words
A radar signal digital processor which suppresses clutter disturbances and enhances useful signals of given Doppler frequency, comprising: a finite impulse response filter (10); an estimator of disturbance parameters (4); a memory (5) coupled to an output of the estimator (4); a weight synthesizer (8) coupled to a second output of the estimator (4) for calculating complex weights; and a register (9) for storing the complex weights for output to the finite impulse response filter (10).
Claim 2
Dependent Claim 76 words
A radar signal digital processor which suppresses clutter disturbances and enhances useful signals of given Doppler frequency, comprising: a finite impulse response filter (10); an estimator of disturbance parameters (4); a memory (5) coupled to an output of the estimator (4); a weight synthesizer (8) coupled to a second output of the estimator (4) for calculating complex weights; and a register (9) for storing the complex weights for output to the finite impulse response filter (10).
Claim 3
Dependent Claim 102 words
The radar signal digital processor of claim 1 wherein the estimator (4) comprises: at least one complex multiplier (12); at least one complex adder (14); at least one modulus extractor (15); a coherent limiter (19); a divider (18); at least two dividers by N (15); at least two multipliers (20) at least two adders (16) at least one square root extractor (17); means for selecting one of the areas of memory (5) which contains the inverse of the disturbance covariance matrix having zero Doppler; and means for providing disturbance Doppler phase to weight synthesizer (8) for the calculation of the complex weights.
Claim 4
Dependent Claim 63 words
The radar signal digital processor of claim 2 in which weight synthesizer (8) comprises: two registers (6) and (7); at least two complex multipliers (21) and (22); three shift registers (9), (24), (25); and a phase generator (26) comprising a shift register (30), two registers (31) and (32), at least two complex conjugate extractors, a delay line (29) and a complex multiplier (28).

References Cited (Backward Citations)

US3872290A Cited
US4217584A Cited
FR2410286A1 Cited
US4377793A Cited
US4584659A Cited
DE3243606A1 Cited
US4578676A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-05-03 1991-11-02 1992-05-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-05-03 1995-11-02 1996-05-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-05-03 1999-11-02 2000-05-03 $7700.00 Window Closed / Lapsed

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