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US4482974A
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Apparatus and method of phase-to-amplitude conversion in a sine function generator
Assignee: Agilent Technologies Inc
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Filing: 1982-08-13
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Granted: 1984-11-13
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Expires: 2002-08-13
Abstract
Abstract A sine wave generator uses a phase-to-amplitude converter (PAC) which functions with a novel multiplier. By using pipelined adders, intermediate amplitude and slope data from storage are combined to get an output amplitude which is equivalent to that from a prior art multiplier but without the objectionable through-put delays inherent in prior art multiplier PAC's.
Inventors
- 👤 Albert W. Kovalick
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 11:00
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/52; G06F7/523; G06F7/533; G06F1/00; G06F1/02; G06F1/03; G06F1/035; G06F1/0356; H; H03; H03C; H03C3/00; G06F2101/00; G06F2101/04
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
108 words
A phase-to-amplitude converter comprising an input port to receive an input binary signal representing phase; a storage means coupled to said input port for providing an intermediate amplitude signal and a subintermediate slope signal in response to a first portion of said input binary signal; a multiplier means coupled to said input port and said storage means for providing in response to a second portion of said input binary signal and to said subintermediate slope signal a multiplier output signal representing intermediate slope; and an adder means coupled to receive said multiplier intermediate slope signal and said intermediate amplitude signal for providing a converter output signal representing amplitude.
Claim 2
Dependent Claim
108 words
A phase-to-amplitude converter comprising an input port to receive an input binary signal representing phase; a storage means coupled to said input port for providing an intermediate amplitude signal and a subintermediate slope signal in response to a first portion of said input binary signal; a multiplier means coupled to said input port and said storage means for providing in response to a second portion of said input binary signal and to said subintermediate slope signal a multiplier output signal representing intermediate slope; and an adder means coupled to receive said multiplier intermediate slope signal and said intermediate amplitude signal for providing a converter output signal representing amplitude.
Claim 3
Dependent Claim
73 words
The phase-to-amplitude converter as in claim 1 wherein said multiplier means further comprises: a plurality of parallel input ports, each accepting (1) said first portion of said input binary signal and (2) one bit of said subintermediate slope signal; plurality of parallel adder circuits each connected to a preselected group of said parallel input ports; and multiplier output port connected to said plurality of parallel adder circuits for providing said intermediate slope signal.
Claim 4
Independent Claim
69 words
A method of converting an input binary signal representing phase to an output binary signal representing amplitude, comprising the steps of: separating said input phase binary signal into first and second portions; converting said first portion into a signal representing intermediate amplitude; converting said second portion into a signal representing intermediate slope; combining said intermediate slope signal and said intermediate amplitude signal to provide said output amplitude binary signal.
Claim 5
Independent Claim
69 words
A method of converting an input binary signal representing phase to an output binary signal representing amplitude, comprising the steps of: separating said input phase binary signal into first and second portions; converting said first portion into a signal representing intermediate amplitude; converting said second portion into a signal representing intermediate slope; combining said intermediate slope signal and said intermediate amplitude signal to provide said output amplitude binary signal.
Claim 6
Dependent Claim
38 words
The method as in claim 3, wherein said step of converting said first portion further comprises the step of addressing a first memory means for storing amplitude values with said first portion to provide said intermediate amplitude signal.
Claim 7
Dependent Claim
56 words
The method as in claim 3 or 4, wherein said step of converting said second portion further comprises the steps of: addressing a second memory means for storing slope values with said first portion to provide a subintermediate slope signal; and combining said subintermediate slope signal with said second portion to provide said intermediate slope signal.
Claim 8
Dependent Claim
54 words
The method as in claim 5, wherein: said step of combining said subintermediate slope signal with said second portion comprises multiplying said subintermediate slope signal with said second portion; and said step of combining said intermediate slope signal and said intermediate amplitude signal comprises adding said intermediate slope signal to said intermediate amplitude signal.
Claim 9
Dependent Claim
57 words
The method as in claim 5 wherein said step of combining said subintermediate slope signals with said second portion further comprises: operating on said second portion with each bit of said subintermediate slope signal in parallel to provide a plurality of resultant data; and combining selected resultant data from said plurality to form said intermediate slope signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-11-13 | 1988-05-14 | 1988-11-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-11-13 | 1992-05-14 | 1992-11-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-11-13 | 1996-05-14 | 1996-11-13 | $7700.00 | Window Closed / Lapsed |