Self-compensating measurement system

Claim 2

A signal compensation arrangement (FIG. 1) comprising, means (104) for measuring the amplitude of supplied signals, a source of a reference signal (111), means (SW1-SWN, 108, 112, 113, 103) for controllably supplying (via 105) said reference signal at a plurality of prescribed amplitudes (via A1-AN) to said amplitude measuring means (104), means (101, 102, 103) for controllably supplying (via 105) an incoming test signal (via T,R) to said amplitude measuring means (104), and control means (105) for utilizing amplitude values of said plurality of reference signal amplitudes (from 104) and of said incoming test signal amplitude (from 104) to generate a version of said incoming test signal amplitude compensated for measurement system inaccuracies and nonlinearities.

Claim 3

An arrangement as defined in claim 1 wherein said control means (105) includes means (FIG. 3) for converting said amplitude values into binary numbers, means for storing said binary numbers (RAM 303) and means (301, 302, 303, 304 etc.) for utilizing said stored binary numbers in conjunction with prescribed constants in a first prescribed compensation process to generate said compensated version (TCORR) of said test signal amplitude.

Claim 4

A signal compensation arrangement (FIG. 1) comprising, means (104) for measuring the amplitude of supplied signals, a source of a reference signal (111), means (SW1-SWN, 108, 112, 113, 103) for controllably supplying (via 105) said reference signal at a plurality of prescribed amplitudes (via A1-AN) to said amplitude measuring means (104), means (101, 102, 103) for controllably supplying (via 105) an incoming test signal (via T,R) to said amplitude measuring means (104), and control means (105) including means (FIG. 3) for converting amplitude values of said plurality of reference signal amplitudes (from 104) and of said incoming test signal amplitude (from 104) into binary numbers, means for storing said binary numbers (303) and means (301, 302, 303, 304, etc.) for utilizing said stored binary numbers in conjunction with prescribed constants in a first prescribed ompensation process to generate a version of said incoming test signal amplitude compensated for measurement system inaccuracies and nonlinearities, said control means (105) further generates control signals for controlling said reference signal source (111) to supply a signal at a predetermined frequency, controlling said means (SW1, SW2, etc.) to supply the reference signal at first and second predetermined amplitude values (via A, SW1 and A2, SW2, 112, 113) to said amplitude measuring means (104), and controlling said means to supply (101, 102) said incoming test signal to said amplitude measuring means (104).

Claim 5

A signal compensation arrangement (FIG. 1) comprising, means (104) for measuring the amplitude of supplied signals, a source of a reference signal (111), means (SW1-SWN, 108, 112, 113, 103) for controllably supplying (via 105) said reference signal at a plurality of prescribed amplitudes (via A1-AN) to said amplitude measuring means (104), means (101, 102, 103) for controllably supplying (via 105) an incoming test signal (via T,R) to said amplitude measuring means (104), and control means (105) including means (FIG. 3) for converting amplitude values of said plurality of reference signal amplitudes (from 104) and of said incoming test signal amplitude (from 104) into binary numbers, means for storing said binary numbers (303) and means (301, 302, 303, 304, etc.) for utilizing said stored binary numbers in conjunction with prescribed constants in a first prescribed ompensation process to generate a version of said incoming test signal amplitude compensated for measurement system inaccuracies and nonlinearities, said control means (105) further generates control signals for controlling said reference signal source (111) to supply a signal at a predetermined frequency, controlling said means (SW1, SW2, etc.) to supply the reference signal at first and second predetermined amplitude values (via A, SW1 and A2, SW2, 112, 113) to said amplitude measuring means (104), and controlling said means to supply (101, 102) said incoming test signal to said amplitude measuring means (104).

Claim 6

A signal compensation arrangement (FIG. 1) comprising, means (104) for measuring the amplitude of supplied signals, a source of a reference signal (111), means (SW1-SWN, 108, 112, 113, 103) for controllably supplying (via 105) said reference signal at prescribed amplitudes (via A1-AN) to said amplitude measuring means (104), means (101, 102, 103) for controllably supplying (via 105) an incoming test signal (via T, R) to said amplitude measuring means (104), and control means (105) utilizing amplitude values of said reference signal amplitudes (from 104) and of said incoming test signal amplitude (from 104) for generating a compensated amplitude version of said test signal in accordance with the compensation process ##EQU7## where TCORR is the compensated amplitude of said test signal, K and K 1 are prescribed constants dependent on a test being run, TA is a first reference signal amplitude, TB is a second reference signal amplitude and TMEAS is the amplitude of an incoming test signal.

Claim 7

A signal compensation arrangement (FIG. 1) comprising, means (104) for measuring the amplitude of supplied signals, a source of a reference signal (111), means (SW1-SWN, 108, 112, 113, 103) for controllably supplying (via 105) said reference signal at prescribed amplitudes (via A1-AN) to said amplitude measuring means (104), means (101, 102, 103) for controllably supplying (via 105) an incoming test signal (via T, R) to said amplitude measuring means (104), and control means (105) utilizing amplitude values of said reference signal amplitudes (from 104) and of said incoming test signal amplitude (from 104) for generating a compensated amplitude version of said test signal in accordance with the compensation process ##EQU7## where TCORR is the compensated amplitude of said test signal, K and K 1 are prescribed constants dependent on a test being run, TA is a first reference signal amplitude, TB is a second reference signal amplitude and TMEAS is the amplitude of an incoming test signal.

Claim 8

A signal compensation arrangement (FIG. 1) comprising, means (104) for measuring the amplitude of supplied signals, a source of a reference signal (111), means (SW1-SWN, 108, 112, 113, 103) for controllably supplying (via 105) said reference signal at a plurality of prescribed amplitudes (via A1-AN) to said amplitude measuring means (104), means (101, 102, 103) for controllably supplying (via 105) an incoming test signal (via T,R) to said amplitude measuring means (104), and control means (105) including a central processor unit (CPU 302) having a plurality of working registers, clock means (301) for supplying a timing signal at a predetermined frequency to the central processor unit (302), read-write memory (RAM 303), input/output (I/O 305), bus (306) and read only memory (ROM 304) having a set of instructions (FIGS. 4-8) stored therein for controlling the control means (105) to generate control signals for individually supplying at least a first reference signal (TA from 111 via A1, SW1, etc.) having a first prescribed amplitude to said amplitude measuring means (104), a second reference signal (TB via A2, SW2 etc.) having a second prescribed amplitude to said amplitude measuring means (104) and an incoming test signal (TMEAS via T, R, 111, 112) to said amplitude measuring means (104), for controlling said amplitude measuring means (104) to measure individually the amplitude of said first reference signal (TA), said second reference signal (TB) and said test signal (TMEAS), and for utilizing said measured amplitudes in a first prescribed compensation process to generate a compensated version (TCORR) of said test signal amplitude (TMEAS).

Claim 9

A signal compensation arrangement (FIG. 1) comprising, means (104) for measuring the amplitude of supplied signals, a source of a reference signal (111), means (SW1-SWN, 108, 112, 113, 103) for controllably supplying (via 105) said reference signal at a plurality of prescribed amplitudes (via A1-AN) to said amplitude measuring means (104), means (101, 102, 103) for controllably supplying (via 105) an incoming test signal (via T,R) to said amplitude measuring means (104), and control means (105) including a central processor unit (CPU 302) having a plurality of working registers, clock means (301) for supplying a timing signal at a predetermined frequency to the central processor unit (302), read-write memory (RAM 303), input/output (I/O 305), bus (306) and read only memory (ROM 304) having a set of instructions (FIGS. 4-8) stored therein for controlling the control means (105) to generate control signals for individually supplying at least a first reference signal (TA from 111 via A1, SW1, etc.) having a first prescribed amplitude to said amplitude measuring means (104), a second reference signal (TB via A2, SW2 etc.) having a second prescribed amplitude to said amplitude measuring means (104) and an incoming test signal (TMEAS via T, R, 111, 112) to said amplitude measuring means (104), for controlling said amplitude measuring means (104) to measure individually the amplitude of said first reference signal (TA), said second reference signal (TB) and said test signal (TMEAS), and for utilizing said measured amplitudes in a first prescribed compensation process to generate a compensated version (TCORR) of said test signal amplitude (TMEAS).

Claim 10

A signal compensation arrangement (FIG. 1) comprising, means (104) for measuring the amplitude of supplied signals, a source of a reference signal (111), means (SW1-SWN, 108, 112, 113, 103) for controllably supplying (via 105) said reference signal at prescribed amplitudes (via A1-AN) to said amplitude measuring means (104), means (101, 102, 103) for controllably supplying (via 105) an incoming test signal (via T,R) to said amplitude measuring means (104), and control means (105) including a central processor unit (CPU 302) having a plurality of working registers, clock means (301) for supplying a timing signal at a predetermined frequency to the central processor unit (302), read-write memory (RAM 303), input/output (I/O 305), bus (306) and read only memory (ROM 304) having a set of instructions (FIGS. 4-8) for controlling the control means (105) to generate control signals for individually supplying at least a first reference signal (TA from 111 via A1, SW1, etc.) having a first prescribed amplitude to said amplitude measuring means (104), a second reference signal (TB via A2, SW2, etc.) having a second prescribed amplitude to said amplitude measuring means (104) and an incoming test signal (TMEAS via T, R, 111, 112) to said amplitude measuring means (104), for controlling said amplitude measuring means (104) to measure individually the amplitudes of said first reference signal (TA), said second reference signal (TB) and said test signal (TMEAS), and for controlling said control means (105) to utilize said measured amplitudes in a first prescribed compensation process having the form ##EQU8## where TCORR is the compensated amplitude of said test signal, K and K 1 are prescribed constants dependent on a test being run, TA is a first reference signal amplitude, TB is a second reference signal amplitude and TMEAS is the amplitude of an incoming test signal.

Claim 11

A signal compensation arrangement (FIG. 1) comprising, means (104) for measuring the amplitude of supplied signals, a source of a reference signal (111), means (SW1-SWN, 108, 112, 113, 103) for controllably supplying (via 105) said reference signal at prescribed amplitudes (via A1-AN) to said amplitude measuring means (104), means (101, 102, 103) for controllably supplying (via 105) an incoming test signal (via T,R) to said amplitude measuring means (104), and control means (105) including a central processor unit (CPU 302) having a plurality of working registers, clock means (301) for supplying a timing signal at a predetermined frequency to the central processor unit (302), read-write memory (RAM 303), input/output (I/O 305), bus (306) and read only memory (ROM 304) having a set of instructions (FIGS. 4-8) for controlling the control means (105) to generate control signals for individually supplying at least a first reference signal (TA from 111 via A1, SW1, etc.) having a first prescribed amplitude to said amplitude measuring means (104), a second reference signal (TB via A2, SW2, etc.) having a second prescribed amplitude to said amplitude measuring means (104) and an incoming test signal (TMEAS via T, R, 111, 112) to said amplitude measuring means (104), for controlling said amplitude measuring means (104) to measure individually the amplitudes of said first reference signal (TA), said second reference signal (TB) and said test signal (TMEAS), and for controlling said control means (105) to utilize said measured amplitudes in a first prescribed compensation process having the form ##EQU8## where TCORR is the compensated amplitude of said test signal, K and K 1 are prescribed constants dependent on a test being run, TA is a first reference signal amplitude, TB is a second reference signal amplitude and TMEAS is the amplitude of an incoming test signal.

Claim 12

A signal amplitude measurement system (FIG. 1) comprising, means (104) for measuring amplitudes of supplied signals, a source (111, A1-AN) of a plurality of reference signals (for example TA, TB) each having a predetermined amplitude, means (111, SW1-SWN) responsive to control signals (from 105) for individually supplying (via 108, 112, 113, 103) said plurality of reference signals (TA, TB) to said amplitude measuring means (104), means (101, 102) responsive to control signals (from 105) for supplying an incoming test signal (TMEAS) to said amplitude measuring means (104), and control means (105) for generating said control signals and including means (FIG. 3) for using amplitude values of said plurality of reference signals (TA, TB) and an amplitude value (TMEAS) of said incoming test signal in a prescribed compensation process (FIGS. 4-8) to generate a version (TCORR) of said test signal amplitude value compensated for measurement system inaccuracies and nonlinearities.

Claim 13

A signal amplitude measurement system (FIG. 1) comprising, means (104) for measuring amplitudes of supplied signals, a source (111, A1-AN) of a plurality of reference signals (for example TA, TB) each having a predetermined amplitude, means (111, SW1-SWN) responsive to control signals (from 105) for individually supplying (via 108, 112, 113, 103) said plurality of reference signals (TA, TB) to said amplitude measuring means (104), means (101, 102) responsive to control signals (from 105) for supplying an incoming test signal (TMEAS) to said amplitude measuring means (104), and control means (105) for generating said control signals and including means (FIG. 3) for using amplitude values of said plurality of reference signals (TA, TB) and an amplitude value (TMEAS) of said incoming test signal in a prescribed compensation process (FIGS. 4-8) to generate a version (TCORR) of said test signal amplitude value compensated for measurement system inaccuracies and nonlinearities.

Claim 14

A signal amplitude measurement system as defined in claim 7 wherein said amplitude measuring means (104) includes means (FIG. 2, 105-210) for converting amplitude values of said supplied signals to pulse signals having widths proportional to said amplitude values, and wherein said control means (105) includes means (FIG. 3 CPU 302, etc.) for converting said reference pulse signal widths into binary numbers, means (RAM 303) for storing said binary numbers and means (CPU 302, etc.) for utilizing said stored binary numbers in said compensation process.

Claim 15

A signal amplitude measurement system (FIG. 1) comprising, means (104) for measuring the amplitudes of supplied signals and including means (FIG. 2, 205-210) for converting amplitude values of said supplied signals to pulse signals having widths proportional to said amplitude values, a source (111, A1-AN) of a plurality of reference signals (for example TA, TB) each having a predetermined amplitude, means (111, SW1-SWN) responsive to control signals (from 105) for individually supplying (via 108, 112, 113, 103) said plurality of reference signals (TA, TB) to said amplitude measuring means (104, FIG. 2, 205-210), means (101, 102) responsive to control signals (from 105) for supplying an incoming test signal (TMEAS) to said amplitude measuring means (104, FIG. 2, 205-210), and control means (105) for generating said control signals and including means (FIG. 3, CPU 302, etc.) for converting said reference pulse signal widths into binary numbers, means (RAM 303) for storing said binary numbers and means for utilizing said stored binary numbers and an amplitude value of said incoming test signal in a prescribed compensation process (FIGS. 4-8) to generate a version (TCORR) of said test signal amplitude value compensated for measurement system inaccuracies and nonlinearities, said control means (105) further includes means (ROM 304) for storing a set of instructions for causing said control means (105) to affect said amplitude compensation process by controllably individually supplying (via SW1, SW2) first and second reference signals (TA and TB) from said reference signal source (111, A1, A2) to said amplitude measuring means, controlling said amplitude measuring means (104) to generate individually first and second pulse signals (via 205-210) having widths proportional to the measured amplitudes of said first and second reference signals, respectively, converting the widths of said first and second reference pulse signals into binary numbers and storing the first and second binary reference numbers (in RAM 303), controllably supplying an incoming test signal (TMEAS via T, R, 101, 102) to said amplitude measuring means (104), controlling said amplitude measuring means (104) to generate a test pulse signal having a width (via 205-210) proportional to the measured amplitude of said test signal (TMEAS), converting the width of said test pulse signal into a binary number and utilizing said reference binary members (TA, TB) and said test binary number (TMES) in said prescribed compensation process.

Claim 16

A signal amplitude measurement system (FIG. 1) comprising, means (104) for measuring the amplitudes of supplied signals and including means (FIG. 2, 205-210) for converting amplitude values of said supplied signals to pulse signals having widths proportional to said amplitude values, a source (111, A1-AN) of a plurality of reference signals (for example TA, TB) each having a predetermined amplitude, means (111, SW1-SWN) responsive to control signals (from 105) for individually supplying (via 108, 112, 113, 103) said plurality of reference signals (TA, TB) to said amplitude measuring means (104, FIG. 2, 205-210), means (101, 102) responsive to control signals (from 105) for supplying an incoming test signal (TMEAS) to said amplitude measuring means (104, FIG. 2, 205-210), and control means (105) for generating said control signals and including means (FIG. 3, CPU 302, etc.) for converting said reference pulse signal widths into binary numbers, means (RAM 303) for storing said binary numbers and means for utilizing said stored binary numbers and an amplitude value of said incoming test signal in a prescribed compensation process (FIGS. 4-8) to generate a version (TCORR) of said test signal amplitude value compensated for measurement system inaccuracies and nonlinearities, said control means (105) further includes means (ROM 304) for storing a set of instructions for causing said control means (105) to affect said amplitude compensation process by controllably individually supplying (via SW1, SW2) first and second reference signals (TA and TB) from said reference signal source (111, A1, A2) to said amplitude measuring means, controlling said amplitude measuring means (104) to generate individually first and second pulse signals (via 205-210) having widths proportional to the measured amplitudes of said first and second reference signals, respectively, converting the widths of said first and second reference pulse signals into binary numbers and storing the first and second binary reference numbers (in RAM 303), controllably supplying an incoming test signal (TMEAS via T, R, 101, 102) to said amplitude measuring means (104), controlling said amplitude measuring means (104) to generate a test pulse signal having a width (via 205-210) proportional to the measured amplitude of said test signal (TMEAS), converting the width of said test pulse signal into a binary number and utilizing said reference binary members (TA, TB) and said test binary number (TMES) in said prescribed compensation process.

Claim 17

A signal amplitude measurement system (FIG. 1) comprising, amplitude measuring means (104, FIG. 2, 205-210) for converting amplitude values of supplied signals to pulse signals having widths proportional to said amplitude values, a source (111, A1-AN) of a plurality of reference signals (for example TA, TB) each having a predetermined amplitude, means (111, SW1-SWN) responsive to control signals (from 105) for individually supplying (via 108, 113, 113, 103) said plurality of reference signals (TA, TB) to said amplitude measuring means (104, FIG. 2, 205-210), means (101, 102) responsive to control signals (from 105) for supplying an incoming test signal (TMEAS) to said amplitude measuring means (104, FIG. 2, 205-210), and control means (105) for generating said control signals and including means (FIG. 3, CPU 302, etc.) for converting said reference pulse signal widths into binary numbers, means (RAM 303) for storing said binary numbers and means for utilizing said stored binary numbers and an amplitude value of said incoming test signal in a prescribed compensation process (FIGS. 4-8) to generate a version (TCORR) of said test signal amplitude value compensated for measurement system inaccuracies and nonlinearities, said prescribed compensation process is ##EQU9## where TCORR is the compensated amplitude of said test signal, K and K 1 are prescribed constants dependent on a test being run, TA is a first reference signal amplitude, TB is a second reference signal amplitude and TMEAS is the amplitude of an incoming test signal.

Claim 18

A signal amplitude measurement system (FIG. 1) comprising, amplitude measuring means (104, FIG. 2, 205-210) for converting amplitude values of supplied signals to pulse signals having widths proportional to said amplitude values, a source (111, A1-AN) of a plurality of reference signals (for example TA, TB) each having a predetermined amplitude, means (111, SW1-SWN) responsive to control signals (from 105) for individually supplying (via 108, 113, 113, 103) said plurality of reference signals (TA, TB) to said amplitude measuring means (104, FIG. 2, 205-210), means (101, 102) responsive to control signals (from 105) for supplying an incoming test signal (TMEAS) to said amplitude measuring means (104, FIG. 2, 205-210), and control means (105) for generating said control signals and including means (FIG. 3, CPU 302, etc.) for converting said reference pulse signal widths into binary numbers, means (RAM 303) for storing said binary numbers and means for utilizing said stored binary numbers and an amplitude value of said incoming test signal in a prescribed compensation process (FIGS. 4-8) to generate a version (TCORR) of said test signal amplitude value compensated for measurement system inaccuracies and nonlinearities, said prescribed compensation process is ##EQU9## where TCORR is the compensated amplitude of said test signal, K and K 1 are prescribed constants dependent on a test being run, TA is a first reference signal amplitude, TB is a second reference signal amplitude and TMEAS is the amplitude of an incoming test signal.