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US4231097A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for calculating a plurality of interpolation values

Assignee: Toshiba Corp
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Filing: 1978-12-07
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Granted: 1980-10-28
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Expires: 1998-12-07
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Abstract

Abstract Apparatus for calculating a plurality of interpolation values is adapted to calculate linear interpolation values, consisting of a second data train, from a first data train and includes a memory for storing the first data train and a calculator for calculating the interpolation value from the corresponding two data in the first data train read out of the memory. The calculator comprises an n-bit register for designating those addresses of the memory where data to be read out of the upper m-bit section of the n-bit register is stored and for determining weighted factor data for calculating the interpolation value at the lower (n-m) bit section of the register, a calculating unit for calculating the interpolation value from the data read out of the memory and the weighting coefficient data, an adder for adding a position increment value for designating the adjacent interpolation value to the register each time each interpolation value is calculated at the calculating unit, and a counter stepped one count for each calculation of each interpolation value and adapted to send an end signal to a central processing unit when a predetermined number of counts are completed. The memory, register, adder and counter are controlled by the central processing unit.

Inventors

  • 👤 Shigeki Shibayama
  • 👤 Kazuhide Iwata
  • 👤 Nobuo Okuda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 14:01
CPC Classifications
G; G06; G06T; G06T12/00; G06T12/10; G06F; G06F17/00; G06F17/10; G06F17/17; G06F17/175; G06T2211/00; G06T2211/40; G06T2211/421; Y; Y10; Y10S; Y10S378/00; Y10S378/901

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 305 words
Apparatus for calculating a plurality of interpolation values I 1 , I 2 , I 3 . . . I n from corresponding values in a data train D 1 , D 2 , D 3 , . . . D n , said apparatus comprising: a memory for sequentially storing said values in said data train; a calculator for calculating an interpolation value I j ; from two values in said data train D j , D j+1 stored in said memory, said calculator comprising: an N-bit register having an upper M-bit portion for designating the addresses of said two values D j , D j+1 stored in said memory and a lower (N-M) bit portion for providing weighting coefficient data; and a calculation unit for calculating the interpolation value I j from said two values D j , D j+1 and said weighting coefficient data; a counter incremented by a constant value each time a said interpolation value I j is calculated by said calculation unit, said counter for generating an end signal after a predetermined number of interpolation values have been counted; an adder for adding the value corresponding to a sampling interval for the interpolation values I j to said N-bit register each time an interpolation value is calculated by said calculation unit; and a central processing unit coupled to said memory, said N-bit register, said adder, and said counter (1) supplying a value to said upper portion of said N-bit register corresponding to an address of a value D j stored in said memory, (2) supplying the initial weighting coefficient data to said lower portion of said N-bit register, (3) providing said value corresponding to a sampling interval to said adder, and (4) supplying a clear instruction signal to said counter responsive to said end signal for clearing said counter.
Claim 2
Dependent Claim 305 words
Apparatus for calculating a plurality of interpolation values I 1 , I 2 , I 3 . . . I n from corresponding values in a data train D 1 , D 2 , D 3 , . . . D n , said apparatus comprising: a memory for sequentially storing said values in said data train; a calculator for calculating an interpolation value I j ; from two values in said data train D j , D j+1 stored in said memory, said calculator comprising: an N-bit register having an upper M-bit portion for designating the addresses of said two values D j , D j+1 stored in said memory and a lower (N-M) bit portion for providing weighting coefficient data; and a calculation unit for calculating the interpolation value I j from said two values D j , D j+1 and said weighting coefficient data; a counter incremented by a constant value each time a said interpolation value I j is calculated by said calculation unit, said counter for generating an end signal after a predetermined number of interpolation values have been counted; an adder for adding the value corresponding to a sampling interval for the interpolation values I j to said N-bit register each time an interpolation value is calculated by said calculation unit; and a central processing unit coupled to said memory, said N-bit register, said adder, and said counter (1) supplying a value to said upper portion of said N-bit register corresponding to an address of a value D j stored in said memory, (2) supplying the initial weighting coefficient data to said lower portion of said N-bit register, (3) providing said value corresponding to a sampling interval to said adder, and (4) supplying a clear instruction signal to said counter responsive to said end signal for clearing said counter.
Claim 3
Dependent Claim 60 words
An apparatus according to claim 1 wherein said weighting coefficient data stored in said lower portion of said N-bit register corresponds to α and wherein said apparatus further includes a second calculating unit coupled to said lower portion of said N-bit register and to said calculation unit for calculating a second weighting coefficient β having a value equal to 1-α.
Claim 4
Dependent Claim 87 words
An apparatus according to claim 1, wherein said data train has a sampling interval equal to D 2 and corresponding to the different between a value D j+1 -D j , and wherein said central processing unit supplies to said adder said sampling interval D 2 and angle data θ i equal to the ange between corresponding interpolation values I j and data values D j , said sampling interval added by said adder to said N-bit register being equal to X D -D 2 cos θ.
Claim 5
Dependent Claim 440 words
A tomographic apparatus for displaying an image of a subject scanned by radiation by generating a plurality of interpolation values I j -I 1 , I 2 , . . . I n from a plurality of data values D j -D 1 , D 2 . . . D n in a data train, said tomographic apparatus comprising: means for generating radiation beams in a predetermined pattern such that radiation beam scans of said subject can be effected in different directions; means for detecting the direction and intensity of radiation beams penetrating said subject; means for converting to projection data parallel components of said detected radiation beams; memory means for storing said projection data as said data values D j in sequential memory storage positions; means for calculating said interpolation values I j from said data values D j to reconstruct an image corresponding to a distribution of absorption factor data of said radiation beams in cross-sectional areas of said subject, said calculating means comprising (1) an N-bit register having an upper M-bit portion for addressing said data values D j stored in said memory means, and a lower (N-M) bit portion for generating weighting coefficient data to obtain an interpolation value I j from two sequential data values D j , D j+1 stored in said memory means, and (2) a calculator unit for computing an interpolation value I j from said addressed two sequential data values D j , D j+1 and said weighting coefficient data; a counter incremented by a fixed value each time an interpolation value is computed by said calculating unit, said counter for generating an end signal after a predetermined number of interpolation values have been computed; an adder for incrementing said lower portion of said N-bit register by an amount equal to a sampling interval for said interpolated data each time an interpolation value is computed; a central processing unit coupled to said memory means, said N-bit register, said adder, and said counter for (1) controlling the storing of said projection data in said memory means, (2) supplying the initial address of a said projection data D j in said memory means to said higher bit portion of said N-bit register, (3) supplying the initial weighting coefficient data to said lower bit portion of said N-bit register, and (4) clearing said counter in response to said end signal; image memory means for storing said computed interpolation values; means for converting said interpolation values stored in said image memory means to corresponding analog values; and means controlled by said analog values for displaying an image of said subject scanned by said radiation beams.
Claim 6
Dependent Claim 440 words
A tomographic apparatus for displaying an image of a subject scanned by radiation by generating a plurality of interpolation values I j -I 1 , I 2 , . . . I n from a plurality of data values D j -D 1 , D 2 . . . D n in a data train, said tomographic apparatus comprising: means for generating radiation beams in a predetermined pattern such that radiation beam scans of said subject can be effected in different directions; means for detecting the direction and intensity of radiation beams penetrating said subject; means for converting to projection data parallel components of said detected radiation beams; memory means for storing said projection data as said data values D j in sequential memory storage positions; means for calculating said interpolation values I j from said data values D j to reconstruct an image corresponding to a distribution of absorption factor data of said radiation beams in cross-sectional areas of said subject, said calculating means comprising (1) an N-bit register having an upper M-bit portion for addressing said data values D j stored in said memory means, and a lower (N-M) bit portion for generating weighting coefficient data to obtain an interpolation value I j from two sequential data values D j , D j+1 stored in said memory means, and (2) a calculator unit for computing an interpolation value I j from said addressed two sequential data values D j , D j+1 and said weighting coefficient data; a counter incremented by a fixed value each time an interpolation value is computed by said calculating unit, said counter for generating an end signal after a predetermined number of interpolation values have been computed; an adder for incrementing said lower portion of said N-bit register by an amount equal to a sampling interval for said interpolated data each time an interpolation value is computed; a central processing unit coupled to said memory means, said N-bit register, said adder, and said counter for (1) controlling the storing of said projection data in said memory means, (2) supplying the initial address of a said projection data D j in said memory means to said higher bit portion of said N-bit register, (3) supplying the initial weighting coefficient data to said lower bit portion of said N-bit register, and (4) clearing said counter in response to said end signal; image memory means for storing said computed interpolation values; means for converting said interpolation values stored in said image memory means to corresponding analog values; and means controlled by said analog values for displaying an image of said subject scanned by said radiation beams.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-10-28 1984-04-28 1984-10-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-10-28 1988-04-28 1988-10-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-10-28 1992-04-28 1992-10-28 $7700.00 Window Closed / Lapsed

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