US4155006A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Driver circuit for a solid-state imaging device
Assignee: Hitachi Ltd
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Filing: 1978-01-06
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Granted: 1979-05-15
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Expires: 1998-01-06
Abstract
Abstract In a solid-state imaging device having photodiodes which are arrayed in the form of a matrix, horizontal output switches and vertical output switches are selectively closed in order to sequentially detect signals stored in the photodiodes, and a horizontal shift register and a vertical shift register supply switching pulses to the switches. A common potential line of both the shift registers is held at a predetermined D. C. potential with respect to ground potential, whereby the dynamic range of the photodiodes is expanded.
Inventors
- 👤 Kazuhiro Sato
- 👤 Hideo Onodera
- 👤 Shusaku Nagahara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 11:56
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/70; H04N25/76; H04N25/779; H04N25/7795
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
160 words
A solid-state imaging device comprising: (a) a photosensor array including a large number of photosensitive elements arranged in rows and columns into the form of a matrix; (b) first and second shift register means for generating scanning pulses for scanning said photosensor array in the horizontal and vertical directions, respectively; (c) load circuit means for deriving output signals from the respective photosensitive elements of said photosensor array, including a first D.C. power source; (d) a plurality of switching circuits connected between said respective photosensitive elements and said load circuit, said switching circuits being selectively switched by the scanning pulses in the horizontal and vertical directions as supplied from said first and second shift registers; and (e) level shifting means for shifting the level of said scanning pulses with respect to ground including a second D.C. power source connected between ground and a common potential line to be connected to ground in each of said first and second shift register means.
Claim 2
Dependent Claim
160 words
A solid-state imaging device comprising: (a) a photosensor array including a large number of photosensitive elements arranged in rows and columns into the form of a matrix; (b) first and second shift register means for generating scanning pulses for scanning said photosensor array in the horizontal and vertical directions, respectively; (c) load circuit means for deriving output signals from the respective photosensitive elements of said photosensor array, including a first D.C. power source; (d) a plurality of switching circuits connected between said respective photosensitive elements and said load circuit, said switching circuits being selectively switched by the scanning pulses in the horizontal and vertical directions as supplied from said first and second shift registers; and (e) level shifting means for shifting the level of said scanning pulses with respect to ground including a second D.C. power source connected between ground and a common potential line to be connected to ground in each of said first and second shift register means.
Claim 3
Dependent Claim
78 words
A solid-state imaging device according to claim 1, wherein said switching circuits comprise a first group of switching elements on which switching pulses are impressed from said horizontal shift register and which serve to select the photosensitive elements of one column of said photosensor array, and a second group of switching elements on which switching pulses are impressed from said vertical shift register and which serve to select the photosensitive elements of one row of said photosensor array.
Claim 4
Dependent Claim
26 words
A solid-state imaging device according to claim 2, wherein each element in said first and second groups of switching elements is a MOS field effect transistor.
Claim 5
Dependent Claim
32 words
A solid-state imaging device according to claim 3, wherein said second D.C. power source supplies a D.C. voltage which is substantially equal to the threshold voltage of the MOS field effect transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1982-05-14 | 1982-11-13 | 1983-05-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1986-05-14 | 1986-11-13 | 1987-05-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1990-05-14 | 1990-11-13 | 1991-05-15 | $7700.00 | Window Closed / Lapsed |