Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
161 words
In an ultrasonic echo system which includes a transmitter, an ultrasonic transducer connected to the transmitter, a receiver coupled to the transducer for receiving echo pulses therefrom, and a television monitor coupled to the receiver, said receiver including: an analog-digital time position encoder for producing a first digital signal representing the time position of the peak amplitude of each received echo pulse within a predetermined sample period; an analog-digital peak amplitude encoder for producing a second digital signal representing the peak amplitude of each of said received echo pulses; digital memory means storing multi-bit digital words representing different gray levels; means coupled to the time position encoder and to the peak amplitude encoder for introducing the first and second digital signals therefrom as multi-bit words to the digital memory means; and means for deriving a plurality of multi-bit words from the digital memory means representing different gray levels in response to each such multi-bit word introduced to said digital memory means.
Claim 2
Dependent Claim
161 words
In an ultrasonic echo system which includes a transmitter, an ultrasonic transducer connected to the transmitter, a receiver coupled to the transducer for receiving echo pulses therefrom, and a television monitor coupled to the receiver, said receiver including: an analog-digital time position encoder for producing a first digital signal representing the time position of the peak amplitude of each received echo pulse within a predetermined sample period; an analog-digital peak amplitude encoder for producing a second digital signal representing the peak amplitude of each of said received echo pulses; digital memory means storing multi-bit digital words representing different gray levels; means coupled to the time position encoder and to the peak amplitude encoder for introducing the first and second digital signals therefrom as multi-bit words to the digital memory means; and means for deriving a plurality of multi-bit words from the digital memory means representing different gray levels in response to each such multi-bit word introduced to said digital memory means.
Claim 3
Dependent Claim
27 words
In the system of claim 1, and which includes further memory means for storing the multi-bit words prior to their being introduced to said digital memory means.
Claim 4
Dependent Claim
107 words
In the system of claim 1, in which said receiver further includes an amplifier for amplifying radio frequency echo pulses received from the transducer; a detector coupled to the amplifier for demodulating the amplified radio frequency echo pulses from the amplifier; a differentiator coupled to the detector for differentiating the demodulated echo pulse from the detector; a peak detector coupled to the differentiator for producing a pulse corresponding in phase and amplitude to the peak amplitude of each of the differentiated echo pulses from the differentiator; and in which said time position encoder and said peak amplitude encoder are coupled to the output of the peak detector.
Claim 5
Dependent Claim
67 words
In the system defined in claim 2, in which said further memory means comprises a random access memory matrix having two sections; and in which said receiver includes register means coupled to the time position encoder and to the peak amplitude encoder for introducing the digital signals therefrom as multi-bit digital words alternately into a first section and into a second section of the further memory means.
Claim 6
Dependent Claim
38 words
In the system defined in claim 1, and in which said digital memory means comprises a random access memory having a plurality of memory cells to be selectively addressed by digital signals derived from the further memory means.
Claim 7
Dependent Claim
36 words
In the system of claim 3, in which said peak amplitude encoder is a two-phase circuit, and which includes a two-phase track and hold circuit interposed between said peak detector and said two-phase peak amplitude encoder.
Claim 8
Dependent Claim
21 words
In the system defined in claim 4, and which includes buffer means interposed between the aforesaid encoders and said register means.