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US4093949A Expired / Lapsed US ⏱️ 0.0 years remaining

Clutter tracker using a smoothed doppler frequency measurement

Assignee: Raytheon Co
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Filing: 1976-05-26
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Granted: 1978-06-06
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Expires: 1996-05-26
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Abstract

Abstract A clutter tracker in which received clutter velocity signal is shifted to zero doppler in order that optimum moving target indicator (MTI) cancellaton can be achieved is disclosed. A frequency controllable voltage controlled crystal oscillator (VCXO) is used as the coherent oscillator (COHO) source. The subject digital system changes the VCXO output bus only once per dwell, thus allowing adequate filtering to achieve desired performance without adversely affecting tracking performance.

Inventors

  • 👤 Norol T. Evans

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 15:22
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/02; G01S13/50; G01S13/52; G01S13/522; G01S13/524; G01S13/5244

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 71 words
A radar clutter tracker system responsive to clutter frequencies, said system having a dual channel delay subsystem, comprising the combination: a dual channel analog-to-digital converter fed by a pair of quadrature signals; a first digital circuit electrically connected to the converter; a second digital circuit electrically connected to the converter; and a crossing detector the input of which is electrically connected to the converter and the first and second digital circuits.
Claim 2
Dependent Claim 71 words
A radar clutter tracker system responsive to clutter frequencies, said system having a dual channel delay subsystem, comprising the combination: a dual channel analog-to-digital converter fed by a pair of quadrature signals; a first digital circuit electrically connected to the converter; a second digital circuit electrically connected to the converter; and a crossing detector the input of which is electrically connected to the converter and the first and second digital circuits.
Claim 3
Dependent Claim 19 words
The system of claim 1 including a pair of binary logic AND gates electrically connected to the crossing detector.
Claim 4
Dependent Claim 18 words
The system of claim 2, including an up-down counter electrically connected to the outputs of the AND gates.
Claim 5
Dependent Claim 25 words
The system of claim 3, including: a clutter detector circuit; and a dividing circuit electrically connected to the up-down counter and the clutter detector circuit.
Claim 6
Dependent Claim 19 words
The system of claim 4 including a digital filter circuit electrically connected to the output of the dividing circuit.
Claim 7
Dependent Claim 15 words
The system of claim 1, including a clutter detector circuit electrically connected to the converter.
Claim 8
Dependent Claim 23 words
The system of claim 6, wherein the clutter detector circuit includes a pair of comparators electrically connected to the output of the converter.
Claim 9
Dependent Claim 223 words
A radar clutter tracker system responsive to radar signals for controlling the clutter frequency comprising: phase angle measurement means responsive to said radar signals, said phase angle measurement means having a resolution of 90° and submultiples thereof; scaling means for developing a digital error signal from the resultant of said phase angle measurement means; digital-to-analog converter means for accepting converted error signals; voltage controlled oscillator means accepting said converted error signal for controlling the frequency thereof; coding means wherein a phase angle excursion greater than one resolution unit is ignored; delay means responsive to signals from a radar system; threshold means for eliminating radar signals below a predetermined signal level; first logic means determining a clutter gate, said phase angle measurement means also being responsive to signal output from said delay means and signals from said radar system; second logic means responsive to signal output from said phase angle measurement means and said clutter gate; first counter means for counting the number of clutter gates existing during a given sample interval; second counter means for counting phase angle units occurring during a given sample interval, said scaling means also being responsive to both first and second counter means and developing therefrom a numerical frequency error signal; and αβ tracking and predicting means for deriving a linear error prediction to said digital-to-analog converter means.
Claim 10
Dependent Claim 223 words
A radar clutter tracker system responsive to radar signals for controlling the clutter frequency comprising: phase angle measurement means responsive to said radar signals, said phase angle measurement means having a resolution of 90° and submultiples thereof; scaling means for developing a digital error signal from the resultant of said phase angle measurement means; digital-to-analog converter means for accepting converted error signals; voltage controlled oscillator means accepting said converted error signal for controlling the frequency thereof; coding means wherein a phase angle excursion greater than one resolution unit is ignored; delay means responsive to signals from a radar system; threshold means for eliminating radar signals below a predetermined signal level; first logic means determining a clutter gate, said phase angle measurement means also being responsive to signal output from said delay means and signals from said radar system; second logic means responsive to signal output from said phase angle measurement means and said clutter gate; first counter means for counting the number of clutter gates existing during a given sample interval; second counter means for counting phase angle units occurring during a given sample interval, said scaling means also being responsive to both first and second counter means and developing therefrom a numerical frequency error signal; and αβ tracking and predicting means for deriving a linear error prediction to said digital-to-analog converter means.
Claim 11
Dependent Claim 68 words
The system of claim 8 wherein said first logic means comprises a logic OR circuit responsive to output signal from said threshhold means; shift register means responsive to signal output from said OR circuit; logic AND means responsive to signal output from said OR circuit and said shift register means; and bistable circuit means responsive to signal output from said logic AND circuit and said shift register means.
Claim 12
Dependent Claim 181 words
A radar clutter tracker system using a smoothed doppler frequency measurement comprising in combination: delay means responsive to in-phase and quadrature signals from a radar system; comparison level means responsive to in-phase and quadrature signals from the radar system; phase angle measurement means responsive to both instant and delayed in-phase and quadrature signals from a radar system; first logic means responsive to both in-phase and quadrature signal levels supplied from the comparison level means; shift register means responsive to output signal from said first logic means; second logic means responsive to output signal from said first logic means and said shift register means and forming therefrom a clutter gate; third logic means responsive to output signals from said phase angle measurement means and said clutter gate; scaling means for developing a digital error signal from the resultant of said phase angle measurement means and said clutter gate; signal smoothing means for reducing second order error signal effects; digital-to-analog converter means for converting said digital error signal; and voltage controlled oscillator means accepting said converted error signal for controlling the frequency thereof.
Claim 13
Dependent Claim 181 words
A radar clutter tracker system using a smoothed doppler frequency measurement comprising in combination: delay means responsive to in-phase and quadrature signals from a radar system; comparison level means responsive to in-phase and quadrature signals from the radar system; phase angle measurement means responsive to both instant and delayed in-phase and quadrature signals from a radar system; first logic means responsive to both in-phase and quadrature signal levels supplied from the comparison level means; shift register means responsive to output signal from said first logic means; second logic means responsive to output signal from said first logic means and said shift register means and forming therefrom a clutter gate; third logic means responsive to output signals from said phase angle measurement means and said clutter gate; scaling means for developing a digital error signal from the resultant of said phase angle measurement means and said clutter gate; signal smoothing means for reducing second order error signal effects; digital-to-analog converter means for converting said digital error signal; and voltage controlled oscillator means accepting said converted error signal for controlling the frequency thereof.
Claim 14
Dependent Claim 19 words
The system of claim 10 wherein said phase angle measurement means has a resolution of 90° and submultiples thereof.
Claim 15
Dependent Claim 20 words
The system of claim 11 including coding means wherein a phase angle excursion greater than one resolution unit is ignored.
Claim 16
Dependent Claim 17 words
The system of claim 12 wherein said signal smoothing means comprises αβ frequency tracking and prediction means.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-06-05 1981-12-05 1982-06-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-06-05 1985-12-05 1986-06-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-06-05 1989-12-05 1990-06-06 $7700.00 Window Closed / Lapsed

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