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US4088990A Expired / Lapsed US ⏱️ 0.0 years remaining

Time of day, time and date and event number generator for recordation of physiological events

Assignee: Individual
•
Filing: 1976-03-10
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Granted: 1978-05-09
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Expires: 1996-03-10
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Abstract

Abstract A code generator generates, upon command, code sequences representing either time of day, time and date, or event number codes, in either single sequences or continuously repeating code sequences for simultaneous recordation with a physiological event on magnetic tape or oscillographic paper for permanently identifying and indexing biomedical data. Multiplexed binary coded decimal output lines of a digital clock are strobed to provide the option of either single frame or continuous frame operation while requiring no critical timing circuits, and the sequencing operations are synchronized by the multiplex timer, which recordation is visually interpretable.

Inventors

  • 👤 Donald J. Sass

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 12:29
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/04; G09G3/06; G09G3/10; G01; G01R; G01R13/00; G01R13/02

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 88 words
A code generator for providing code sequences representing diverse information for recordation on a storage medium along with data acquisition, comprising: a digital clock for providing both multiplexed binary coded decimal and enabling signals; parallel load serial out shift registers arranged in series, each shift register coupled to said binary coded decimal signals and repective enabling signals for receiving said binary coded decimal and said enabling signals for recordation on said storage medium; and switch means adapted to be depressed whenever a code sequence is to be recorded.
Claim 2
Dependent Claim 88 words
A code generator for providing code sequences representing diverse information for recordation on a storage medium along with data acquisition, comprising: a digital clock for providing both multiplexed binary coded decimal and enabling signals; parallel load serial out shift registers arranged in series, each shift register coupled to said binary coded decimal signals and repective enabling signals for receiving said binary coded decimal and said enabling signals for recordation on said storage medium; and switch means adapted to be depressed whenever a code sequence is to be recorded.
Claim 3
Dependent Claim 74 words
A code generator as recited in claim 1 further comprising means for combining said binary coded decimal and said enabling signals for visual display, wherein said diverse information comprises time, date and time and event, said data acquisition comprises biomedical data, said combining means for visual display comprises binary coded decimal to seven segment decoders coupled to receive both said binary coded decimal and said enabling signals, said display comprising a gas discharge display.
Claim 4
Dependent Claim 25 words
A code generator as recited in claim 2 further including a first decade counter clock coupled to said shift registers for clocking said shift registers.
Claim 5
Dependent Claim 39 words
A code generator as recited in claim 3 further comprising: logic means coupled to said switch means for enabling said shift registers to receive said binary coded decimal signals and for enabling said clock to provide said clock signals.
Claim 6
Dependent Claim 97 words
A code generator as recited in claim 4 wherein said logic means comprises: a first NAND gate coupled to receive a logical high from said depressed switch means; first multivibrator means coupled to receive said first NAND gate output; a second decade counter coupled to said first multivibrator means for ensuring that said first multivibrator output is logical high for the length of time of one series of enabling signals; second multivibrator means coupled to receive the output of said first multivibrator means; and third multivibrator means coupled to receive the output of said second multivibrator means.
Claim 7
Dependent Claim 43 words
A code generator as recited in claim 5, wherein: said third multivibrator means enables said first decade counter; and said shift register enabling means comprises a plurality of NAND gates coupled to respective enabling signals and the output of said second multivibrator means.
Claim 8
Dependent Claim 61 words
A code generator as recited in claim 6 further comprising: an operational amplifier coupled to the last shift register in said series of shift register for providing digital signals for recordation, said recordation signals being arranged in a visually interpretable manner with data ones represented as positive voltage pulses, data zeros represented by negative voltage pulses and spaces at zero volts.
Claim 9
Dependent Claim 43 words
A code generator as recited in claim 7 further including an enabling NAND gate coupled to the input of said operational amplifier, a three bit binary counter and said first decade counter block being provided as the input to said enabling NAND gate.
Claim 10
Dependent Claim 60 words
A code generator as recited in claim 8 further including means for inhibiting said shift registers upon completion of said code sequence recordation, comprising a serial-in shift register coupled to the last of said series of shift registers, and a NAND gate coupled to said shift register, said NAND gate output coupled to the input of said third multivibrator means.
Claim 11
Dependent Claim 27 words
A code generator as recited in claim 9 further comprising switch means for selecting either time, event or date and time for recordation on said storage medium.
Claim 12
Dependent Claim 40 words
A code generator as recited in claim 10 further comprising an event code portion comprising a three decade arrangement for storing and transferring event numbers to said serial shift registers, and means for incrementing and clearing said stored event numbers.
Claim 13
Dependent Claim 40 words
A code generator as recited in claim 11 further comprising a date code portion comprising a three decade arrangement for storing and transferring Julian dates to said serial shift registers, and means for incrementing and clearing said stored Julian date.

References Cited (Backward Citations)

US3371349A Cited
US3646606A Cited
US3714663A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-05-08 1981-11-07 1982-05-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-05-08 1985-11-07 1986-05-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-05-08 1989-11-07 1990-05-09 $7700.00 Window Closed / Lapsed

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