Low power transmission line terminator

Claim 1

An integrated circuit structure comprising: a semiconductor body; a first field effect transistor having source and drain regions of a first conductivity type formed in a semiconductor region of a second conductivity type within said body; a semiconductor region of said first conductivity type formed in said same semiconductor region of said second conductivity type is proximity to said first field effect transistor; a second field effect transistor having source and drain regions of the second conductivity type formed in the said semiconductor region of said first conductivity type, such that a parasitic bipolar transistor latch is formed in said semiconductor body, said bipolar transistor latch including three P-N junctions, the first P-N junction being formed by the source region of said first field effect transistor and the semiconductor region of the second conductivity type within the semiconductor body, the second P-N junction being formed by the semiconductor region of the second conductivity type within the semiconductor body and the semiconductor region of said first conductivity type formed in said same semiconductor region of said second conductivity type, the third P-N junction being formed by the semiconductor region of said first conductivity type formed in said same semiconductor region of said second conductivity type and the drain region of said second field effect transistor, said three P-N junctions being sufficiently closely spaced for transistor action; a first potential source directly coupled to the source region of said first field effect transistor; a second potential source directly coupled to the source region of said second field effect transistor; a transmission line having a near end and a far end, a conductive path connecting the drain region of said first field effect transistor and the drain region of said second field effect transistor forming an output connected to the near end of said transmission line; and a pair of reverse biased terminator diodes connected in series and also connected to said transmission line for preventing reflected signals on said transmission line from setting said parasitic bipolar transistor latch.