Apparatus for discriminating the type of white blood corpusles and for counting the number thereof

Claim 2

Apparatus for discriminating the type and counting the number of white blood corpuscles comprising means for irradiating with light a predetermined area of a slide supporting stained white blood corpuscles, means for producing a microscopic image of said white blood corpuscles which is analyzed into a plurality of given wavelength components over the entire range of visible light, means for producing an electric signal corresponding to the density of light transmitted through each sampling point of the resulting microscopic image of each of said plurality of wavelength components, a memory device for storing said electric signal, means for normalizing said electric signal, means for comparing the normalized electric signal and a reference data signal established for each type of said white blood corpuscles and producing a similarity signal indicating the similarity, means for detecting and storing a first similarity signal corresponding to the maximum similarity and a second similarity signal corresponding to the next maximum similarity thus determined and for detecting and storing the type of the white blood corpuscles corresponding to said maximum value and the type of the white blood corpuscles corresponding to said value next to the maximum, means responsive to the result of said detections for counting the number of the white blood corpuscles at respective sampling points, and means for estimating the number of the white blood corpuscles of respective types in a predetermined area of said slide.

Claim 3

The apparatus as claimed in claim 1 wherein said means for producing said microscopic image comprises a microscope, an optical system for said microscope, and a rotary type interference filter included in said optical system for an analyzing visible light having a wavelength of from 400 nm to 700 nm into wavelength components at a spacing of predetermined wavelength.

Claim 4

The apparatus as claimed in claim 1 wherein said means for producing said electric signal comprises a photoelectric transducer for producing a video signal having a level corresponding to the tone of a microscopic image of each wavelength, and an analogue-digital converter for converting said video signal into a digital signal corresponding to the tone at a predetermined sampling point in said microscopic image.

Claim 5

The apparatus as claimed in claim 1 wherein said memory device comprises means for dividing said picture image into a plurality of subareas each containing sampling points of the number equal to the number obtained by dividing the total number of sampling points in said microscopic image by an integer, and a memory circuit for accumulating and storing a plurality of the data in each subarea.

Claim 6

The apparatus as claimed in claim 1 wherein said normalizing means comprises a first gate circuit connected to receive the data stored in said memory device, an operation control circuit for controlling the operation of said first gate circuit, a first memory device for storing one set of data provided by said first gate circuit, a second gate circuit connected to receive the data stored in said first memory device, a third gate connected to receive a data succeeding the data stored in said first memory device, first and second squaring circuits for producing squares of the output data from said second and third gate circuits, a first multiplying circuit and a first addition circuit respectively impressed with the output data from said second and third gate circuits, first, second, third and fourth accumulator-adders respectively accumulate and add the outputs from said first and second squaring circuits, said first multiplying circuit and said first addition circuit, circuit means for detecting the minimum value of the data passed through said first gate circuit, a first subtraction circuit for obtaining the difference between the detected minimum value and the output from said fourth accumulator-adder, a first coefficient memory device storing a predetermined constant, a second multiplying circuit for obtaining the product of the content of said first coefficient memory device and said minimum value, a third multiplying circuit for obtaining the product of the output from said second multiplying circuit and the output of said second subtraction circuit, a second addition circuit for adding the output from said third multiplying circuit and the outputs from said first, second and third accumulator-adders, a second coefficient memory device for storing a predetermined constant, a fourth multiplying circuit for obtaining the product of the content of said second coefficient memory device and the output of said second addition circuit, circuit means for obtaining the square root of the output of said fourth multiplying circuit, a second subtraction circuit for obtaining the difference between the input data applied to said first gate circuit and said minimum value detected, and a division circuit for dividing the output from said second subtraction circuit by the output from said circuit means for obtaining the square root.

Claim 7

The apparatus as claimed in claim 5 wherein said operation control circuit comprises first, second, third and fourth signal input conductors, a one-shot generator connected to said first signal input conductor for applying a driving signal to said second addition circuit, said second coefficient memory circuit, said fourth multiplying circuit, said first coefficient memory circuit and said second multiplying circuit, a first AND gate circuit connected to said first and third input conductors, a second AND gate circuit connected to said second and third conductors and an inverter connected to said fourth input conductor.

Claim 8

The apparatus as claimed in claim 5 wherein said minimum value detecting circuit means comprises a register for storing input data, a comparator for comparing the content of said register and new input data, and control means including an AND gate circuit which, when the newly applied data are smaller than the content of said register, applies a load signal to said register for substituting said smaller data for the content of said register.

Claim 9

The apparatus according to claim 1 wherein said means for determining similarity comprises a reference data memory device in which reference data have been stored and a circuit for calculating the similarity between the reference data stored in said reference memory and said normalized input data.

Claim 10

The apparatus as claimed in claim 8 wherein said similarity calculating circuit comprises a first memory device for storing one set of data from said normalizing circuit, a second memory circuit for storing one set of said reference data, a first addition circuit for adding the content of said first memory device to succeeding data, a second addition circuit for adding the content of said second memory device to succeeding data, a first multiplier for multiplying the outputs from said first and second addition circuits, a second multiplier for multiplying the contents of said first and second memory devices, a third multiplier for multiplying two data succeeding the data stored in said first and second memory devices, first, second and third accumulator-adders for accumulating and adding the respective outputs of said first, second and third multipliers, a third addition circuit for adding together the outputs of said first, second and third accumulator-adders, a coefficient memory device for storing a predetermined constant, and a fourth multiplier for obtaining the product of the output of said coefficient memory device and the output of said third addition circuit.

Claim 11

The apparatus as claimed in claim 1 wherein said maximum value detecting circuit comprises a first register for storing the output data from said similarity calculating circuit, a maximum value register and a next to the maximum value register respectively storing the content of said first register, a second register to which the contents of said maximum value register and said next to the maximum value register are to be transferred, a comparator for comparing the contents of said first and second registers, a third register for storing the data representing the types of the white blood corpuscles regarding the data stored in said maximum value register, and a fourth register for storing the data representing the types of the white blood corpuscles regarding the data stored in said next to the maximum value register.

Claim 12

The apparatus as claimed in claim 1 wherein said detecting and memory means includes a judgment circuit for judging the identity between the type of said maximum value and the type of said value next to the maximum.

Claim 13

The apparatus as claimed in claim 1 wherein said judgment circuit comprises a subtraction circuit for obtaining the difference between said maximum value and said value next to the maximum, a circuit for determining the absolute value of the output of said subtraction circuit, a threshold value setting circuit, a comparator for comparing the threshold value set thereby and said absolute value, an AND gate circuit for determining the logical product of the data representing said maximum value and said value next to the maximum, and a decoder for producing a signal which represents the type of the white blood corpuscles when said AND gate circuit produces an output.

Claim 14

The apparatus as claimed in claim 1 wherein said means for estimating the number of the white blood corpuscles comprise a plurality of memory devices for storing the number of spots corresponding to the area of the cellar substance of respective types of the white blood corpuscles and a corresponding number of division circuits for dividing the contents of said plurality of memory devices by the output from said means for counting the number.