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US3968019A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing low power loss semiconductor device

Assignee: Hitachi Ltd
•
Filing: 1975-03-21
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Granted: 1976-07-06
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Expires: 1995-03-21
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Abstract

Abstract By forming a metallic coating on a sufficiently cleaned semiconductor substrate through ion plating, a low power loss and high switching speed semiconductor device is obtained which differs from an ordinary semiconductor device with a diffused junction. In an interface between the metallic coating and the semiconductor substrate, a considerably thin metal-injected layer is formed toward the semiconductor substrate. Schottky barrier devices may be formed by the method of the invention.

Inventors

  • 👤 Masanobu Hanazono
  • 👤 Osamu Asai
  • 👤 Moriaki Fuyama
  • 👤 Masao Iimura
  • 👤 Hideyuki Yagi
  • 👤 Masahiro Okamura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 17:59
CPC Classifications
H; H10; H10P; H10P95/00; H10D; H10D99/00; H10P50/00; H10P50/20

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 99 words
A method of manufacturing a low power loss semiconductor device comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, the semiconductor substrate including a lower resistivity layer and a higher resistivity layer adjacent thereto, the higher resistivity layer being doped with sufficient impurities to provide a resistivity of about 0.1 to 10 Ω . cm, and bombarding the surface of the higher resistivity layer of the semiconductor substrate with metal particles ionized in a glow discharge region to deposit a metal coating on the semiconductor substrate thereby forming a semiconductor-metal contact junction.
Claim 2
Independent Claim 99 words
A method of manufacturing a low power loss semiconductor device comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, the semiconductor substrate including a lower resistivity layer and a higher resistivity layer adjacent thereto, the higher resistivity layer being doped with sufficient impurities to provide a resistivity of about 0.1 to 10 Ω . cm, and bombarding the surface of the higher resistivity layer of the semiconductor substrate with metal particles ionized in a glow discharge region to deposit a metal coating on the semiconductor substrate thereby forming a semiconductor-metal contact junction.
Claim 3
Independent Claim 118 words
A method of manufacturing a low power loss semiconductor device comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of 10 - 1 to 10 - 4 Torr, the semiconductor substrate including a lower resistivity layer and a higher resistivity layer adjacent thereto, the higher resistivity layer being doped with sufficient impurities to provide a resistivity of about 0.1 to 10 Ω . cm and bombarding the surface of the higher resistivity layer of the semiconductor substrate with metal particles ionized in a glow discharge region to deposit a metal coating on the semiconductor substrate to form a metal-injected layer of 10 to 1000 A thickness in the semiconductor substrate beneath the metal coating.
Claim 4
Independent Claim 118 words
A method of manufacturing a low power loss semiconductor device comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of 10 - 1 to 10 - 4 Torr, the semiconductor substrate including a lower resistivity layer and a higher resistivity layer adjacent thereto, the higher resistivity layer being doped with sufficient impurities to provide a resistivity of about 0.1 to 10 Ω . cm and bombarding the surface of the higher resistivity layer of the semiconductor substrate with metal particles ionized in a glow discharge region to deposit a metal coating on the semiconductor substrate to form a metal-injected layer of 10 to 1000 A thickness in the semiconductor substrate beneath the metal coating.
Claim 5
Dependent Claim 19 words
A method according to claim 2, wherein a voltage of 1 to 10 KV is applied to the cathode.
Claim 6
Independent Claim 114 words
A method of manufacturing a low power loss semiconductor device comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, the semiconductor substrate including a lower resistivity layer and a higher resistivity layer adjacent thereto, the higher resistivity layer being doped with sufficient impurities to provide a resistivity on the order of 0.1 to 10 Ω . cm, and bombarding the surface of the higher resistivity layer of the semiconductor substrate with metal particles ionized in a glow discharge region to deposit a metal coating on the semiconductor substrate to form a metal-injected layer of 10 to 1000 A thickness in the semiconductor substrate beneath the metal coating.
Claim 7
Independent Claim 114 words
A method of manufacturing a low power loss semiconductor device comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, the semiconductor substrate including a lower resistivity layer and a higher resistivity layer adjacent thereto, the higher resistivity layer being doped with sufficient impurities to provide a resistivity on the order of 0.1 to 10 Ω . cm, and bombarding the surface of the higher resistivity layer of the semiconductor substrate with metal particles ionized in a glow discharge region to deposit a metal coating on the semiconductor substrate to form a metal-injected layer of 10 to 1000 A thickness in the semiconductor substrate beneath the metal coating.
Claim 8
Dependent Claim 27 words
A method according to claim 4, wherein a photoresist mask pattern is formed on a surface of the semiconductor substrate to be coated with the metal coating.
Claim 9
Independent Claim 82 words
A method of manufacturing a low power loss semiconductor comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of 9 × 10 - 3 to 10 - 4 Torr, and bombarding the semiconductor substrate with ionized metal particles to deposit a metal coating on the semiconductor substrate, formation of said ionized metal particles being facilitated by subjecting a metal source for said particles to an RF field to improve the ionization probability of the metal in said source.
Claim 10
Independent Claim 82 words
A method of manufacturing a low power loss semiconductor comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of 9 × 10 - 3 to 10 - 4 Torr, and bombarding the semiconductor substrate with ionized metal particles to deposit a metal coating on the semiconductor substrate, formation of said ionized metal particles being facilitated by subjecting a metal source for said particles to an RF field to improve the ionization probability of the metal in said source.
Claim 11
Independent Claim 84 words
A method of manufacturing a low power loss semiconductor device, comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, generating a glow discharge in the vicinity of the cathode to bombard the semiconductor substrate with ionized inert gases, bombarding the semiconductor substrate with ionized metal particles to deposit a metal coating on the semiconductor substrate, and heat-treating the metal coating-deposited semiconductor substrate at a predetermined temperature while maintaining the glow discharge in the vicinity of the cathode.
Claim 12
Independent Claim 84 words
A method of manufacturing a low power loss semiconductor device, comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, generating a glow discharge in the vicinity of the cathode to bombard the semiconductor substrate with ionized inert gases, bombarding the semiconductor substrate with ionized metal particles to deposit a metal coating on the semiconductor substrate, and heat-treating the metal coating-deposited semiconductor substrate at a predetermined temperature while maintaining the glow discharge in the vicinity of the cathode.
Claim 13
Independent Claim 92 words
A method of manufacturing a low power loss semiconductor device, comprising supporting a silicon semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, generating a glow discharge in the vicinity of the cathode to bombard the silicon semiconductor substrate with ionized inert gases, bombarding the silicon semiconductor substrate with ionized aluminum particles to deposit an aluminum coating on the silicon semiconductor substrate, and heating the aluminum coated silicon semiconductor substrate to a temperature of 400° to 500°C while maintaining the glow discharge in the vicinity of the cathode.
Claim 14
Independent Claim 92 words
A method of manufacturing a low power loss semiconductor device, comprising supporting a silicon semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, generating a glow discharge in the vicinity of the cathode to bombard the silicon semiconductor substrate with ionized inert gases, bombarding the silicon semiconductor substrate with ionized aluminum particles to deposit an aluminum coating on the silicon semiconductor substrate, and heating the aluminum coated silicon semiconductor substrate to a temperature of 400° to 500°C while maintaining the glow discharge in the vicinity of the cathode.
Claim 15
Independent Claim 67 words
A method of manufacturing a low power loss semiconductor device, comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, bombarding the semiconductor substrate with ionized inert gases, bombarding the semiconductor substrate with neutral metal particles to deposit a metal coating of 50 to 500 A thickness on the semiconductor substrate, and bombarding the metal-coated semiconductor substrate with ionized metal particles.
Claim 16
Independent Claim 67 words
A method of manufacturing a low power loss semiconductor device, comprising supporting a semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, bombarding the semiconductor substrate with ionized inert gases, bombarding the semiconductor substrate with neutral metal particles to deposit a metal coating of 50 to 500 A thickness on the semiconductor substrate, and bombarding the metal-coated semiconductor substrate with ionized metal particles.
Claim 17
Dependent Claim 25 words
A method according to claim 9, wherein the semiconductor substrate includes an electrically insulating layer at a region which the ionized metal particles are bombarded.
Claim 18
Independent Claim 107 words
A method of manufacturing a low power loss semiconductor device, comprising the steps of supporting a semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, bombarding the semiconductor substrate with ionized inert gases, bombarding the semiconductor substrate with neutral metal particles to deposit a metal coating of 50 to 500 A thickness on the semiconductor substrate, bombarding the metal coated semiconductor substrate with metal particles ionized with the application of a voltage of 1 to 10 KV to the cathode, and heating the semiconductor substrate to a temperature of 400° to 500°C while maintaining the glow discharge in the vicinity of the cathode.
Claim 19
Independent Claim 107 words
A method of manufacturing a low power loss semiconductor device, comprising the steps of supporting a semiconductor substrate on a cathode in an inert gas atmosphere of low pressure, bombarding the semiconductor substrate with ionized inert gases, bombarding the semiconductor substrate with neutral metal particles to deposit a metal coating of 50 to 500 A thickness on the semiconductor substrate, bombarding the metal coated semiconductor substrate with metal particles ionized with the application of a voltage of 1 to 10 KV to the cathode, and heating the semiconductor substrate to a temperature of 400° to 500°C while maintaining the glow discharge in the vicinity of the cathode.
Claim 20
Dependent Claim 20 words
A method according to claim 11 wherein said semiconductor substrate is a silicon semiconductor substrate and said metal is aluminum.
Claim 21
Independent Claim 111 words
A method of manufacturing a low power loss semiconductor device having a metal-semiconductor contact junction, comprising supporting a semiconductor substrate in a cathode holder provided in an inert gas atmosphere of low pressure, and generating a glow discharge in the vicinity of the cathode holder to ion plate a metal coating on the semiconductor substrate by means of a metal source for evaporating metal particles to be ion plated on the semiconductor substrate, the semiconductor substrate being supported in the cathode holder such that the surface of the semiconductor substrate opposite the surface of the semiconductor substrate on which said metal-semiconductor contact junction is to be formed faces said metal source.
Claim 22
Independent Claim 111 words
A method of manufacturing a low power loss semiconductor device having a metal-semiconductor contact junction, comprising supporting a semiconductor substrate in a cathode holder provided in an inert gas atmosphere of low pressure, and generating a glow discharge in the vicinity of the cathode holder to ion plate a metal coating on the semiconductor substrate by means of a metal source for evaporating metal particles to be ion plated on the semiconductor substrate, the semiconductor substrate being supported in the cathode holder such that the surface of the semiconductor substrate opposite the surface of the semiconductor substrate on which said metal-semiconductor contact junction is to be formed faces said metal source.

References Cited (Backward Citations)

US3451912A Cited
US3832232A Cited
US3855612A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-07-06 1980-01-05 1980-07-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-07-06 1984-01-05 1984-07-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-07-06 1988-01-05 1988-07-06 $7700.00 Window Closed / Lapsed

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