Multiprocessing system implemented with microprocessors

Claim 1

An expandable modular control system for controlling a second controlled system being monitored by said expandable modular control system comprising: means comprising a sense point module and a control point module, each of said modules comprising an array of memory devices corresponding to a plurality of n-bit words, each n-bit word having a corresponding memory address associated therewith, said sense point module being coupled to and monitoring said second system, said second system generating n-bit data words which are stored in said sense point module memory devices at assigned ones of said memory addresses responsive thereto, said control point module being coupled to and controlling said second system in accordance with n-bit control words stored in said control point module memory devices at assigned ones of said memory addresses; external modular memory means for storing said n-bit words at assigned memory addresses therein; multiprocessing means including a plurality of microprocessor modules for asynchronously processing said n-bit data words to generate said n-bit control words for controlling said second system; system bus means including extended memory address bus means and extended data transfer bus means intercoupling said multiprocessing means with said external modular memory means and said sense point and control point modules, said modular microprocessors selectively addressing said memory addresses in said modular external memory means and said sense point and control point modules via said extended memory address bus means to transfer said n-bit words therebetween via said extended data transfer bus means for processing by said multiprocessing means to control said second system; and bus assigner means including logic means assigning a priority of operation to each of said microprocessor modules for selectively assigning access to said system bus means to said microprocessor modules, each of said microprocessor modules having a different assigned priority, said bus assigner means assigning use of said system bus means to said microprocessor module having the highest priority whenever one or more of said microprocessor modules requests access to said external memory, said bus assigner means permitting transfer of said n-bit words between the selected one of said microprocessor modules having priority and the external modular memory means, the sense point module and the control point module.