US3930142A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital timer and counter device with dual control
Assignee: EAGLE SIGNAL CONTROLS CORP A CORP OF DE
•
Filing: 1974-06-13
•
Granted: 1975-12-30
•
Expires: 1994-06-13
Abstract
Abstract A digital counting device for counting input pulses for either timing or counting. This device comprises a binary counter responsive to input counts and having a first mode select means for causing up binary counting of the counter upon receipt of input counts and a second mode select means for causing down binary counting of the counter upon receipt of input counts. A binary memory circuit is provided with means interconnecting the binary counter and the binary memory circuit for creating a compare signal when the binary number of the binary counter corresponds to the binary number of the memory circuit. A sense signal is created when the binary counter reaches a select number, such as zero. Means responsive to either the compare signal or the sense signal creates an output signal when the memory and counter reach comparison or when the counter reaches zero. There is provided first control means including means for loading a selected coded number into the counter and means for activating the down counting mode select means and second control means including means for loading a selected number into the memory circuit and means for activating the up counting mode select means. By selecting one of these control means and introducing input pulses to the counter, the counter can count up to the loaded memory number or count down to zero in the counter.
Inventors
- 👤 Carl H Meier
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 19:27
CPC Classifications
H; H01; H01H; H01H43/00; G; G04; G04F; G04F1/00; G04F1/005; G04F10/00; G04F10/04; H03; H03K; H03K21/00; H03K21/08; H03K23/00; H03K23/64; H03K23/66; H03K23/665; G05; G05B; G05B2219/00; G05B2219/20; G05B2219/24; G05B2219/24125; G05B2219/25; G05B2219/25045
Claims Analysis
Total Claims: 96
Claim 1
Independent Claim
210 words
A digital counting device for counting input pulses and producing an output signal after a given number of said input pulses, said counting device comprising: a binary counter responsive to input counts and having a first mode select means for causing up binary counting of said counter upon receipt of input counts and a second mode select means for causing down binary counting of said counter upon receipt of input counts; a binary memory circuit; means interconnecting said binary counter and said binary memory circuit for creating a compare signal when the binary number of said binary counter corresponds to the binary number in said memory circuit; means for creating a sense signal when said binary counter reaches a given number; means responsive to either of said compare sIgnal or said sense signal for creating said output signal; means for selecting a binary coded number; first control means including means for loading said selected coded number into said counter and means for activating said second mode select means; a second control means including means for loading said selected number into said memory circuit and means for activating said first mode select means; means for selecting only one of said control means; and, means for introducing input pulses to said counter.
Claim 2
Dependent Claim
210 words
A digital counting device for counting input pulses and producing an output signal after a given number of said input pulses, said counting device comprising: a binary counter responsive to input counts and having a first mode select means for causing up binary counting of said counter upon receipt of input counts and a second mode select means for causing down binary counting of said counter upon receipt of input counts; a binary memory circuit; means interconnecting said binary counter and said binary memory circuit for creating a compare signal when the binary number of said binary counter corresponds to the binary number in said memory circuit; means for creating a sense signal when said binary counter reaches a given number; means responsive to either of said compare sIgnal or said sense signal for creating said output signal; means for selecting a binary coded number; first control means including means for loading said selected coded number into said counter and means for activating said second mode select means; a second control means including means for loading said selected number into said memory circuit and means for activating said first mode select means; means for selecting only one of said control means; and, means for introducing input pulses to said counter.
Claim 3
Dependent Claim
32 words
A digital counting device as defined in claim 1 including means for activating one of said control means in response to said output signal for repeating the counting cycle of said device.
Claim 4
Dependent Claim
27 words
A digital counting device as defined in claim 1 including means responsive to said sense signal for shifting from second select mode to said first select mode.
Claim 5
Dependent Claim
20 words
A digital counting device as defined in claim 1 including means responsive to said output signal for inhibiting said counter.
Claim 6
Dependent Claim
20 words
A digital counting device as defined in claim 1 including means for maintaining said output signal for a selected time.
Claim 7
Dependent Claim
41 words
A digital counting device as defined in claim 1 including first and second output terminals each having a one bit binary logic output and means responsive to an input count after said output signal for reversing the logic on said terminals.
Claim 8
Dependent Claim
141 words
A digital counting device as defined in claim 1 wherein said memory circuit and said binary counter are divided into n-stages each corresponding to a digit of said selected number, a plurality of binary coding networks each corresponding to one of said selected digits, manual means for setting each of said networks to a desired digit of said selected number, means for connecting said networks in parallel to said stages of said counter and memory circuit, means for creating in succession n multiplexing signals, means responsive to each of said multiplexing signals for directing the set code of a selected one of said networks into said connecting means and means responsive to each of said multiplexing signals for allowing a selected one of said stages of said counter and said memory circuit to accept said set code on said connecting means.
Claim 9
Dependent Claim
28 words
A digital counting device as defined in claim 7 including means for visually displaying the digit in each stage of said counter during the operation of said device.
Claim 10
Dependent Claim
42 words
A digital counting device as defined in claim 1 wherein said memory circuit and said binary counter are divided into stages corresponding to digits and means for visually displaying the digit in each stage of said counter during operation of said device.
Claim 11
Dependent Claim
15 words
A digital counting device as defined in claim 1 wherein said given number is zero.
Claim 12
Dependent Claim
16 words
A digital counting device as defined in claim 1 including means for inhibiting said input counts.
Claim 13
Dependent Claim
19 words
A digital counting device as defined in claim 11 wherein said inhibiting means is responsive to said output signal.
Claim 14
Dependent Claim
52 words
A digital counting device as defined in claim 1 including means for creating said input counts, said creating means includes a circuit for generating a series of control pulses having a known frequency, and a divider means for producing one input count upon the creation of a preselected number of control pulses.
Claim 15
Dependent Claim
21 words
A digital counting device as defined in claim 13 wherein said divider means includes means for selectively changing said preselected number.
Claim 16
Dependent Claim
123 words
A digital counting device as defined in claim 1 including means for creating said input counts, said creating means includes means for a circuit for generating a series of control pulses having a known frequency, first and second input circuits each having an input and an output, means responsive to a signal on the output of said input circuits for selecting between said first and second mode select means, switch means for connecting one of said inputs of one of said input circuits to said control pulse creating means whereby said control pulse is used to select the mode of operatioN of said counter and means responsive to signals in either of said outputs of said input circuits for creating said input counts.
Claim 17
Dependent Claim
17 words
A digital counting device as defined in claim 1 including count means for creating random input counts.
Claim 18
Dependent Claim
48 words
A digital counting device as defined in claim 16 wherein said count means includes a switch means having first and second conditions, means for selectively shifting said switch means between said conditions and means for creating an input count when said switch means is in said first condition.
Claim 19
Dependent Claim
26 words
A digital counting device as defined in claim 17 including feedback means for holding said input count when said switch means is in said first condition.
Claim 20
Dependent Claim
68 words
A digital counting device as defined in claim 1 wherein said means for selecting one of said first and second control means includes a control line connected to said counter, means responsive to binary logic on said control line for inhibiting said counter loading means when a given binary logic appears on said control line and means for selectively applying said given binary logic to said control line.
Claim 21
Dependent Claim
77 words
A digital counting device as defined in claim 19 wherein said means for selecting one of said first and second control means further includes a first and second terminal and means for directing input pulses to one of said terminals, means responsive to receipt of input pulses on said first terminal for activating said first mode select means and means responsive to receipt of input pulses on said second terminal for activating said second mode select means.
Claim 22
Dependent Claim
76 words
A digital counting device as defined in claim 1 wherein said means for selecting one of said first and second control means includes a first and second terminal and means for directing input pulses to one of said terminals, means responsive to receipt of input pulses on said first terminal for activating said first mode select means and means responsive to receipt of input pulses on said second terminal for activating said second mode select means.
Claim 23
Dependent Claim
255 words
A digital counting device for counting input pulses, said device including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for selecting a given digit; means for decoding said digit into a binary code having said selected number of bits of binary information; means for directing said code to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said code into said memory units; second loading means responsive to said cycle control pulse for loading said code into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a counting pulse; means for creating a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digit; means responsive to either of said sense or said compare signals for creating a second control pulse; first control means including means for actuating said first loading means and means for actuating said up counting means; second control means including means for actuating said second loading means and means for actuating said down counting means; and means for actuating only one of said first and second control means.
Claim 24
Dependent Claim
255 words
A digital counting device for counting input pulses, said device including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for selecting a given digit; means for decoding said digit into a binary code having said selected number of bits of binary information; means for directing said code to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said code into said memory units; second loading means responsive to said cycle control pulse for loading said code into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a counting pulse; means for creating a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digit; means responsive to either of said sense or said compare signals for creating a second control pulse; first control means including means for actuating said first loading means and means for actuating said up counting means; second control means including means for actuating said second loading means and means for actuating said down counting means; and means for actuating only one of said first and second control means.
Claim 25
Dependent Claim
32 words
A digital counting device as defined in claim 22 including means for activating one of said control means in response to said output signal for repeating the counting cycle of said device.
Claim 26
Dependent Claim
32 words
A digital counting device as defined in claim 22 including means responsive to said sense signal for shifting from said down counting means to said up counting means during a counting cycle.
Claim 27
Dependent Claim
20 words
A digital counting device as definEd in claim 22 including means responsive to said output signal for inhibiting said counter.
Claim 28
Dependent Claim
28 words
A digital counting device as defined in claim 22 including means for visually displaying the digit in each stage of said counter during the operation of said device.
Claim 29
Dependent Claim
24 words
A digital counting device as defined in claim 22 including repeat means responsive to said second control pulse for creating said cycle control pulse.
Claim 30
Dependent Claim
16 words
A digital counting device as defined in claim 27 including means for inhibiting said repeat means.
Claim 31
Dependent Claim
23 words
A digital counting device as defined in claim 22 including means for creating an output pulse in response to said second control pulse.
Claim 32
Dependent Claim
20 words
A digital counting device as defined in claim 29 including means for maintaining said output pulse for a preselected time.
Claim 33
Dependent Claim
51 words
A digital counting device as defined in claim 22 including first and second output means, means for creating a first binary logic signal on said first output means before said second control pulse and means for creating a second binary logic signal on said first output after said second control pulse.
Claim 34
Dependent Claim
47 words
A digital counting device as defined in claim 31 including means for creating said second binary logic signal on said second output means before said second control pulse and means for creating said first binary logic signal on said second output means after said second control pulse.
Claim 35
Dependent Claim
33 words
A digital counting device as defined in claim 32 including means for creating said first binary logic signal on both said first and second output means in response to said second control pulse.
Claim 36
Dependent Claim
33 words
A digital counting device as defined in claim 31 including means for creating said first binary logic signal on both said first and second output means in response to said second control pulse.
Claim 37
Dependent Claim
249 words
A digital counting device for counting input pulses, said counter including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for selecting a given digit; means for decoding said digit into a binary code having said selected number of bits of binary information; means for directing said code to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said code into said memory units; second loading means responsive to said cycle control pulse for loading said code into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a counting pulse; means for creating a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digit; means responsive to either of said sense or said compare signals for creating a second control pulse; first control means including means for actuating said first loading means and said up counting means; second control means including means for actuating said second loading means and said down counting means; and means for actuating only one of said first and second control means.
Claim 38
Dependent Claim
249 words
A digital counting device for counting input pulses, said counter including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for selecting a given digit; means for decoding said digit into a binary code having said selected number of bits of binary information; means for directing said code to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said code into said memory units; second loading means responsive to said cycle control pulse for loading said code into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a counting pulse; means for creating a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digit; means responsive to either of said sense or said compare signals for creating a second control pulse; first control means including means for actuating said first loading means and said up counting means; second control means including means for actuating said second loading means and said down counting means; and means for actuating only one of said first and second control means.
Claim 39
Dependent Claim
32 words
A digital counting device as defined in claim 35 including means for activating one of said control means in response to said output signal for repeating the counting cycle of said device.
Claim 40
Dependent Claim
32 words
A digital counting device as defined in claim 35 including means responsive to said sense signal for shifting from said down counting means to said up counting means during a counting cycle.
Claim 41
Dependent Claim
20 words
A digital counting device as defined in claim 35 including means responsive to said output signal for inhibiting said counter.
Claim 42
Dependent Claim
28 words
A digital counting device as defined in claim 35 including means for visually displaying the digit in each stage of said counter during the operation of said device.
Claim 43
Dependent Claim
24 words
A digitAl counting device as defined in claim 35 including repeat means responsive to said second control pulse for creating said cycle control pulse.
Claim 44
Dependent Claim
16 words
A digital counting device as defined in claim 40 including means for inhibiting said repeat means.
Claim 45
Dependent Claim
23 words
A digital counting device as defined in claim 35 including means for creating an output pulse in response to said second control pulse.
Claim 46
Dependent Claim
20 words
A digital counting device as defined in claim 42 including means for maintaining said output pulse for a preselected time.
Claim 47
Dependent Claim
51 words
A digital counting device as defined in claim 35 including first and second output means, means for creating a first binary logic signal on said first output means before said second control pulse and means for creating a second binary logic signal on said first output after said second control pulse.
Claim 48
Dependent Claim
47 words
A digital counting device as defined in claim 44 including means for creating said second binary logic signal on said second output means before said second control pulse and means for creating said first binary logic signal on said second output means after said second control pulse.
Claim 49
Dependent Claim
33 words
A digital counting device as defined in claim 45 including means for creating said first binary logic signal on both said first and second output means in response to said second control pulse.
Claim 50
Dependent Claim
33 words
A digital counting device as defined in claim 44 including means for creating said first binary logic signal on both said first and second output means in response to said second control pulse.
Claim 51
Dependent Claim
198 words
A digital counting device for counting input pulses, said counting device comprising: means for producing a binary code representative of a selected number; a binary counter means for binary counting upon receipt of counting pulses; loading means for selectively loading a binary coded number into said counter means; first mode select means for causing said binary counter means to count up; second mode select means for causing said binary counter means to count down; means for starting said counting device; means responsive to said starting means for activating said loading means; pulse generating means for directing counting pulses to said counter means; first and second input means for directing input pulses to said pulse generating means for causing said counting pulses; means for directing input pulses to a selected one of said input means; means responsive to actuation of the selected one of said input means for actuating one of said mode select means whereby said counting means counts in the direction determined by the input means of said input pulses; and pulse discriminating means associated with said first and second input means for preventing simultaneous actuation of said generating means by said first and second input means.
Claim 52
Dependent Claim
198 words
A digital counting device for counting input pulses, said counting device comprising: means for producing a binary code representative of a selected number; a binary counter means for binary counting upon receipt of counting pulses; loading means for selectively loading a binary coded number into said counter means; first mode select means for causing said binary counter means to count up; second mode select means for causing said binary counter means to count down; means for starting said counting device; means responsive to said starting means for activating said loading means; pulse generating means for directing counting pulses to said counter means; first and second input means for directing input pulses to said pulse generating means for causing said counting pulses; means for directing input pulses to a selected one of said input means; means responsive to actuation of the selected one of said input means for actuating one of said mode select means whereby said counting means counts in the direction determined by the input means of said input pulses; and pulse discriminating means associated with said first and second input means for preventing simultaneous actuation of said generating means by said first and second input means.
Claim 53
Dependent Claim
116 words
A digital counting device as defined in claim 48 wherein said pulse discriminating means includes a first pulse discriminating circuit connected between said first input means and said generating means, a second pulse discriminating circuit connected between said second input means and said generating means, means for creating a succession of first and second gating pulses having a frequency substantially greater than said input pulses, and means in said discriminating circuits for stepping said input pulses through said discriminating pulses in response to said gating pulses whereby said gating pulses step the first of two input pulses applied separately to said first and second input means and then steps the second of said two input pulses.
Claim 54
Dependent Claim
112 words
A digital counting device for counting input pulses, said counting device comprising: a binary counter means for binary counting upon receipt of counting pulses; means for starting said counting device; pulse generating means for directing counting pulses to said counter means; first mode select means for causing said binary counter means to count up; second mode select means for causing said binary counter means to count down; first and second input means for directing iNput pulses to said generating means for causing said counting pulses; and pulse discriminating means associated with said first and second input means for preventing simultaneous actuation of said generating means by said first and second input means.
Claim 55
Dependent Claim
112 words
A digital counting device for counting input pulses, said counting device comprising: a binary counter means for binary counting upon receipt of counting pulses; means for starting said counting device; pulse generating means for directing counting pulses to said counter means; first mode select means for causing said binary counter means to count up; second mode select means for causing said binary counter means to count down; first and second input means for directing iNput pulses to said generating means for causing said counting pulses; and pulse discriminating means associated with said first and second input means for preventing simultaneous actuation of said generating means by said first and second input means.
Claim 56
Dependent Claim
116 words
A digital counting device as defined in claim 50 wherein said pulse discriminating means includes a first pulse discriminating circuit connected between said first input means and said generating means, a second pulse discriminating circuit connected between said second input means and said generating means, means for creating a succession of first and second gating pulses having a frequency substantially greater than said input pulses, and means in said discriminating circuits for stepping said input pulses through said discriminating pulses in response to said gating pulses whereby said gating pulses step the first of two input pulses applied separately to said first and second input means and then steps the second of said two input pulses.
Claim 57
Dependent Claim
27 words
A digital counting device as defined in claim 1 wherein said binary counter, said binary memory circuit and said interconnecting means are provided on a MOS-FET chip.
Claim 58
Dependent Claim
23 words
A digital counting device as defined in claim 52 wherein said means for creating a sense signal are provided on said MOS-FET chip.
Claim 59
Dependent Claim
22 words
A digital counting device as defined in claim 53 wherein said first and second control means are provided on said MOS-FET chip.
Claim 60
Dependent Claim
27 words
A digital counting device as defined in claim 1 wherein said binary counter, said binary memory circuit and said interconnecting means are provided on an LSI chip.
Claim 61
Dependent Claim
22 words
A digital counting device as defined in claim 22 wherein said counter and said memory circuit are provided on a MOS-FET chip.
Claim 62
Dependent Claim
19 words
A digital counting device as defined in claim 56 wherein said comparing means is provided on said MOS-FET chip.
Claim 63
Dependent Claim
24 words
A digital counting device as defined in claim 57 wherein said sensing means for creating a sense signal is provided on said MOS-FET chip.
Claim 64
Dependent Claim
22 words
A digital counting device as defined in claim 56 wherein said first and second control means are provided on said MOS-FET chip.
Claim 65
Dependent Claim
22 words
A digital counting device as defined in claim 22 wherein said counter and said memory circuit are provided on an LSI chip.
Claim 66
Dependent Claim
22 words
A digital counting device as defined in claim 35 wherein said memory circuit and said counter are provided on a MOS-FET chip.
Claim 67
Dependent Claim
19 words
A digital counting device as defined in claim 61 wherein said comparing means is provided on said MOS-FET chip.
Claim 68
Dependent Claim
24 words
A digital counting device as defined in claim 61 wherein said sensing means for creating a sense signal is provided on said MOS-FET chip.
Claim 69
Dependent Claim
22 words
A digital counting device as defined in claim 61 wherein said first and second control means are provided on said MOS-FET chip.
Claim 70
Dependent Claim
22 words
A digital counting device as defined in claim 35 wherein said memory circuit and said counter are provided on an LSI chip.
Claim 71
Dependent Claim
20 words
A digital counting device as defined in claim 50 wherein said binary counter means is provided on a MOS-FET chip.
Claim 72
Dependent Claim
20 words
A digital counting device as defined in claim 50 wherein said binary counter means is provided on an LSI chip.
Claim 73
Dependent Claim
125 words
A digital timing device for counting input control pulses and producing an output signal after a given number of said input control pulses, said timing device comprising a binary counter provided on a MOS-FET chip, said binary counter having a first control means for causing it to count up when receiving a counting pulse and a second control means for causing it to count down when receiving a counting pulse; means for selectively energizing one of said first and second control means; means for creating input control pulses at a rate which is a multiple of six pulses per second; means for creating five counting pulses from each six of said input control pulses; and means for directing said counting pulses to said binary counter.
Claim 74
Dependent Claim
125 words
A digital timing device for counting input control pulses and producing an output signal after a given number of said input control pulses, said timing device comprising a binary counter provided on a MOS-FET chip, said binary counter having a first control means for causing it to count up when receiving a counting pulse and a second control means for causing it to count down when receiving a counting pulse; means for selectively energizing one of said first and second control means; means for creating input control pulses at a rate which is a multiple of six pulses per second; means for creating five counting pulses from each six of said input control pulses; and means for directing said counting pulses to said binary counter.
Claim 75
Dependent Claim
25 words
A digital timing device as defined in claim 68 wherein Said input pulse creating means includes means for creating 120 input control pulses per second.
Claim 76
Dependent Claim
124 words
A digital timing device for counting input control pulses and producing an output signal after a given number of said input control pulses, said timing device comprising a binary counter provided in a MOS-FET chip, said binary counter having a first control means for causing it to count up when receiving a counting pulse and a second control means for causing it to count down when receiving a counting pulse; means for selectively energizing one of said first and second control means; means for creating input control pulses at a rate which is a multiple of six pulses per second; means for creating a preselected ratio of counting pulses to said control pulses; and, means for directing said counting pulses to said binary counter.
Claim 77
Dependent Claim
124 words
A digital timing device for counting input control pulses and producing an output signal after a given number of said input control pulses, said timing device comprising a binary counter provided in a MOS-FET chip, said binary counter having a first control means for causing it to count up when receiving a counting pulse and a second control means for causing it to count down when receiving a counting pulse; means for selectively energizing one of said first and second control means; means for creating input control pulses at a rate which is a multiple of six pulses per second; means for creating a preselected ratio of counting pulses to said control pulses; and, means for directing said counting pulses to said binary counter.
Claim 78
Dependent Claim
25 words
A digital timing device as defined in claim 70 wherein said input pulse creating means includes means for creating 120 input control pulses per second.
Claim 79
Dependent Claim
125 words
A digital timing device for counting input control pulses and producing an output signal after a given number of said input control pulses, said timing device comprising a binary counter provided on an LSI chip, said binary counter having a first control means for causing it to count up when receiving a counting pulse and a second control means for causing it to count down when receiving a counting pulse; means for selectively energizing one of said first and second control means; means for creating input control pulses at a rate which is a multiple of six pulses per second; means for creating five counting pulses from each six of said input control pulses; and means for directing said counting pulses to said binary counter.
Claim 80
Dependent Claim
125 words
A digital timing device for counting input control pulses and producing an output signal after a given number of said input control pulses, said timing device comprising a binary counter provided on an LSI chip, said binary counter having a first control means for causing it to count up when receiving a counting pulse and a second control means for causing it to count down when receiving a counting pulse; means for selectively energizing one of said first and second control means; means for creating input control pulses at a rate which is a multiple of six pulses per second; means for creating five counting pulses from each six of said input control pulses; and means for directing said counting pulses to said binary counter.
Claim 81
Dependent Claim
25 words
A digital timing device as defined in claim 72 wherein said input pulse creating means includes means for creating 120 input control pulses per second.
Claim 82
Dependent Claim
124 words
A digital timing device for counting input control pulses and producing an output signal after a given number of said input control pulses, said timing device comprising a binary counter provided in an LSI chip, said binary counter having a first control means for causing it to count up when receiving a counting pulse and a second control means for causing it to count down when receiving a counting pulse; means for selectively energizing one of said first and second control means; means for creating input control pulses at a rate which is a multiple of six pulses per second; means for creating a preselected ratio of counting pulses to said control pulses; and, means for directing said counting pulses to said binary counter.
Claim 83
Dependent Claim
124 words
A digital timing device for counting input control pulses and producing an output signal after a given number of said input control pulses, said timing device comprising a binary counter provided in an LSI chip, said binary counter having a first control means for causing it to count up when receiving a counting pulse and a second control means for causing it to count down when receiving a counting pulse; means for selectively energizing one of said first and second control means; means for creating input control pulses at a rate which is a multiple of six pulses per second; means for creating a preselected ratio of counting pulses to said control pulses; and, means for directing said counting pulses to said binary counter.
Claim 84
Dependent Claim
25 words
A digital timing device as defined in claim 74 wherein said input pulse creating means includes means for creating 120 input control pulses per second.
Claim 85
Dependent Claim
245 words
A MOS-FET chip for use in a digital counting device for counting input pulses, said MOS-FET chip including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for directing binary coded digital information to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said binary coded information into said memory units; second loading means responsive to said cycle control pulse for loading said binary coded information into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a counting pulse; means for receiving a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digital information; means responsive to either of said sense or said compare signals for creating a second control pulse; first control meanS including means for actuating said first loading means and means for actuating said up counting means; second control means including means for actuating said second loading means and means for actuating said down counting means; and means for actuating only one of said first and second control means.
Claim 86
Dependent Claim
245 words
A MOS-FET chip for use in a digital counting device for counting input pulses, said MOS-FET chip including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for directing binary coded digital information to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said binary coded information into said memory units; second loading means responsive to said cycle control pulse for loading said binary coded information into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a counting pulse; means for receiving a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digital information; means responsive to either of said sense or said compare signals for creating a second control pulse; first control meanS including means for actuating said first loading means and means for actuating said up counting means; second control means including means for actuating said second loading means and means for actuating said down counting means; and means for actuating only one of said first and second control means.
Claim 87
Dependent Claim
245 words
An LSI chip for use in a digital counting device for counting input pulses, said LSI chip including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for directing binary coded digital information to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said binary coded information into said memory units; second loading means responsive to said cycle control pulse for loading said binary coded information into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a counting pulse; means for receiving a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digital information; means responsive to either of said sense or said compare signals for creating a second control pulse; first control means including means for actuating said first loading means and means for actuating said up counting means; second control means including means for actuating said second loading means and means for actuating said down counting means; and means for actuating only one of said first and second control means.
Claim 88
Dependent Claim
245 words
An LSI chip for use in a digital counting device for counting input pulses, said LSI chip including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for directing binary coded digital information to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said binary coded information into said memory units; second loading means responsive to said cycle control pulse for loading said binary coded information into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a counting pulse; means for receiving a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digital information; means responsive to either of said sense or said compare signals for creating a second control pulse; first control means including means for actuating said first loading means and means for actuating said up counting means; second control means including means for actuating said second loading means and means for actuating said down counting means; and means for actuating only one of said first and second control means.
Claim 89
Dependent Claim
234 words
A MOS-FET chip for use in a digital counting device for counting input pulses, said MOS-FET chip including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for directing binary coded digital information to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said code into said memory units; second loading means responsive to said cycle control pulse for loading said code into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a counting pulse; means for creating a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digit; means responsive to either of said sense or said compare signals for creating a second control pulse; first control means including means for actuating said first loading means and said up counting means; second control means including means for actuating said second loading means and said down counting means; and means for actuating only one of said first and second control means.
Claim 90
Dependent Claim
234 words
A MOS-FET chip for use in a digital counting device for counting input pulses, said MOS-FET chip including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for directing binary coded digital information to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said code into said memory units; second loading means responsive to said cycle control pulse for loading said code into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a counting pulse; means for creating a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digit; means responsive to either of said sense or said compare signals for creating a second control pulse; first control means including means for actuating said first loading means and said up counting means; second control means including means for actuating said second loading means and said down counting means; and means for actuating only one of said first and second control means.
Claim 91
Dependent Claim
234 words
An LSI chip fir use in a digital counting device for counting input pulses, said LSI chip including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for directing binary coded digital information to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said code into said memory units; second loading means responsive to said cycle control pulse for loading said code into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a Counting pulse; means for creating a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digit; means responsive to either of said sense or said compare signals for creating a second control pulse; first control means including means for actuating said first loading means and said up counting means; second control means including means for actuating said second loading means and said down counting means; and means for actuating only one of said first and second control means.
Claim 92
Dependent Claim
234 words
An LSI chip fir use in a digital counting device for counting input pulses, said LSI chip including a memory circuit having a selected number of one bit storage units; a counter having one stage corresponding to each of said memory storage units; means for directing binary coded digital information to said memory units and said counter stages; means for creating a cycle control pulse; first loading means responsive to said cycle control pulse for loading said code into said memory units; second loading means responsive to said cycle control pulse for loading said code into said counter stages; up counting means for causing said counter to count up when receiving a counting pulse; down counting means for causing said counter to count down when receiving a Counting pulse; means for creating a succession of counting pulses; sensing means for creating a sense signal when said counter is down counted to zero, comparing means for creating a compare signal when said memory units and said counter stages have the same coded digit; means responsive to either of said sense or said compare signals for creating a second control pulse; first control means including means for actuating said first loading means and said up counting means; second control means including means for actuating said second loading means and said down counting means; and means for actuating only one of said first and second control means.
Claim 93
Dependent Claim
118 words
A MOS-FET chip for use in a digital counting device for counting input pulses, said MOS-FET chip comprising: a binary counter means for binary counting upon receipt of counting pulses; means for starting said counting device; pulse generating means for directing counting pulses to said counter means; first mode select means for causing said binary counter means to count up; second mode select means for causing said binary counter means to count down; first and second input means for directing input pulses to said generating means for causing said counting pulses; and pulse discriminating means associated with said first and second input means for preventing simultaneous actuation of said generating means by said first and second input means.
Claim 94
Dependent Claim
118 words
A MOS-FET chip for use in a digital counting device for counting input pulses, said MOS-FET chip comprising: a binary counter means for binary counting upon receipt of counting pulses; means for starting said counting device; pulse generating means for directing counting pulses to said counter means; first mode select means for causing said binary counter means to count up; second mode select means for causing said binary counter means to count down; first and second input means for directing input pulses to said generating means for causing said counting pulses; and pulse discriminating means associated with said first and second input means for preventing simultaneous actuation of said generating means by said first and second input means.
Claim 95
Dependent Claim
118 words
An LSI chip for use in a digital counting device for counting input pulses, said LSI chip comprising: a binary counter means for binary counting upon receipt of counting pulses; means for starting said counting device; pulse generating means for directing counting pulses to said counter means; first mode select means for causing said binary counter means to count up; second mode select means for causing said binary counter means to count down; first and second input means for directing input pulses to said generating means for causing said counting pulses; and pulse discriminating means associated with said first and second input means for preventing simultaneous actuation of said generating means by said first and second input means.
Claim 96
Dependent Claim
118 words
An LSI chip for use in a digital counting device for counting input pulses, said LSI chip comprising: a binary counter means for binary counting upon receipt of counting pulses; means for starting said counting device; pulse generating means for directing counting pulses to said counter means; first mode select means for causing said binary counter means to count up; second mode select means for causing said binary counter means to count down; first and second input means for directing input pulses to said generating means for causing said counting pulses; and pulse discriminating means associated with said first and second input means for preventing simultaneous actuation of said generating means by said first and second input means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-12-29 | 1979-06-30 | 1979-12-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-12-29 | 1983-06-30 | 1983-12-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-12-29 | 1987-06-30 | 1987-12-30 | $7700.00 | Window Closed / Lapsed |