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US3924109A Expired / Lapsed US ⏱️ 0.0 years remaining

Automatic circuit card testing system

Assignee: TECHNOLOGY MARKETING Inc
•
Filing: 1974-07-22
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Granted: 1975-12-02
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Expires: 1994-07-22
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Abstract

Abstract A system for testing circuits, and particularly adapted for testing printed circuit board assemblies including digital logic circuits, said circuits having multiple pin connectors, including a removable portable data storage element which defines, in machine readable form, a sequence of input signals, and additionally defines selected ones of said multiple pin connectors for application of said input signals, said storage element additionally defining, in machine readable form, the proper sequence of output signals to be produced by said circuit in response to the input signals, and selected ones of said multiple pin connectors on which said output signals should occur, and means for comparing said proper sequence of output signals with the actual output signal sequence from said circuit.

Inventors

  • 👤 Jai Hun Jhu
  • 👤 George H Wells
  • 👤 Thomas J Mulder
  • 👤 Don E Mcdonald

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 08:05
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/319; G01R31/31903; G01R31/31908

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 225 words
Apparatus for automatically testing a variety of different digital electronic logic circuits, comprising: a master clock; a pulse generator responsive to said master clock for producing synchronized input signals for said logic circuits; a connector having multiple independent electrical contacts for connecting said apparatus to said circuits; comparator means responsive to said master clock for comparing output signals from said logic circuits with signals representing proper operation of said logic circuits; a plurality of switching means connected to said connector contacts, said comparataor means and said pulse generators; a control unit for sequencing said pulse generators, switching means and comparator means to produce input signals on selected ones of said connector contacts and compare output signals from selected ones of said connector contacts; a first plurality of manually actuated switches each labeled in correspondence with one of said multiple connector contacts; a second plurality of manually actuated switches for designating input pins, output pins, and sequences of input data signals for a specific one of said variety of different circuits; and means responsive to said first and second plurality of manually actuated switches for storing data and for inputting data into said control unit, said data defining: a. a sequence of operation of said switching means; b. a sequence of operation of said pulse generator; and c. a sequence of operation of said comparator means.
Claim 2
Dependent Claim 225 words
Apparatus for automatically testing a variety of different digital electronic logic circuits, comprising: a master clock; a pulse generator responsive to said master clock for producing synchronized input signals for said logic circuits; a connector having multiple independent electrical contacts for connecting said apparatus to said circuits; comparator means responsive to said master clock for comparing output signals from said logic circuits with signals representing proper operation of said logic circuits; a plurality of switching means connected to said connector contacts, said comparataor means and said pulse generators; a control unit for sequencing said pulse generators, switching means and comparator means to produce input signals on selected ones of said connector contacts and compare output signals from selected ones of said connector contacts; a first plurality of manually actuated switches each labeled in correspondence with one of said multiple connector contacts; a second plurality of manually actuated switches for designating input pins, output pins, and sequences of input data signals for a specific one of said variety of different circuits; and means responsive to said first and second plurality of manually actuated switches for storing data and for inputting data into said control unit, said data defining: a. a sequence of operation of said switching means; b. a sequence of operation of said pulse generator; and c. a sequence of operation of said comparator means.
Claim 3
Dependent Claim 62 words
Apparatus for automatically testing a variety of different digital electronic logic circuits as defined in claim 1 wherein said second plurality of manually actuated switches additionally includes switches for designaTing sequences of output data signals, and said means for storing data additionally stores a sequence of expected output signals produced by said electronic logic circuits in response to said synchronized input signals.
Claim 4
Dependent Claim 50 words
Apparatus for automatically testing a variety of different digital electronic logic circuits as defined in claim 1 additionally comprising: means for storing data produced as output signals from said digital electronic logic circuits in response to said synchronized input signals for comparison with the output of other digital electronic circuits.
Claim 5
Dependent Claim 50 words
Apparatus for automatically testing a variety of different digital electronic logic circuits as defined in claim 1 wherein said means for storing data comprises a digital electronic memory circuit, said apparatus additionally comprising: means for transferring said data from said digital electronic memory circuit to a portable data storage card.
Claim 6
Dependent Claim 75 words
Apparatus for automatically testing a variety of different digital electronic logic circuits as defined in claim 1 additionally comprising a third plurality of manually actuated switches for designating a predetermined number of repetitions of sequences of operation of said pulse generator, and wherein said means for storing data is additionally responsive to said third plurality of switches to store data defining a predetermined number of repetitions of selected sequences of operation of said pulse generator.
Claim 7
Dependent Claim 157 words
Apparatus for automatically testing a variety of different digital electronic logic circuits, each such circuit including an identical multiple pin connector, comprising: a multiple pin connector for mating with said circuit multiple pin connector; a testing circuit comprising: means producing input signals for application to said logic circuits; means for measuring output signals from said logic circuits; and switching means connecting said testing circuit to said mating multiple pin connector, said switching means connecting a first plurality of said multiple pins to said input signal producing means and connecting a second plurality of said multiple pins to said output signal measuring means; a plurality of manually actuated switches corresponding with said multiple pins for producing a sequence of signals specifying a sequence of operations of said switching means; means for storing said sequence of signals specifying a sequence of operations of said switching means; and means for actuating said switching means in accordance with said stored data.
Claim 8
Dependent Claim 157 words
Apparatus for automatically testing a variety of different digital electronic logic circuits, each such circuit including an identical multiple pin connector, comprising: a multiple pin connector for mating with said circuit multiple pin connector; a testing circuit comprising: means producing input signals for application to said logic circuits; means for measuring output signals from said logic circuits; and switching means connecting said testing circuit to said mating multiple pin connector, said switching means connecting a first plurality of said multiple pins to said input signal producing means and connecting a second plurality of said multiple pins to said output signal measuring means; a plurality of manually actuated switches corresponding with said multiple pins for producing a sequence of signals specifying a sequence of operations of said switching means; means for storing said sequence of signals specifying a sequence of operations of said switching means; and means for actuating said switching means in accordance with said stored data.
Claim 9
Dependent Claim 36 words
Apparatus for automatically testing a variety of digital electronic circuits as defined in claim 6 wherein said means for storing said sequence of signals stores data defining said first and second plurality of said multiple pins.
Claim 10
Dependent Claim 45 words
Apparatus for automatically testing a variety of digital electronic circuits as defined in claim 6 wherein said means for storing said sequence of signals stores said signals on a portable magnetic card to permit said apparatus to respond to different sets of said stored signals.
Claim 11
Dependent Claim 61 words
Apparatus for automatically testing a variety of different digital electronic logic circuits as defined in claim 6 wherein said means for measuring output signals measures said signals after a time delay of varying duration, said apparatus additionally comprising: a plurality of manually actuated switches corresponding with predetermined delay time periods for producing delay signals; and means for storing said delay signals.
Claim 12
Dependent Claim 185 words
Apparatus for testing a plurality of different digital logic assemblies each having an identical multiple pin connector, comprising: means for storing data identifying a first portion of said multiple pins as input pins, identifying a second portion of said pins as output pins, identifying a sequence of signals to be applied to said input pins, and identifying a sequence of output signals to be received from said output pins, said means comprising: a first plurality of manuaLly actuated switches each labeled to correspond with one of said multiple pins; a second plurality of manually actuated switches for designating input pins, output pins, and signal sequences; and a memory element responsive to said first and second plurality of manually actuated switches; input signal producing means; output signal comparator means; and switching means responsive to said data storing means and connected to said multiple pin connector, said input signal producing means and said output signal comparator means for connecting said input signal producing means to said identified first portion of multiple pins and for connecting said output signal comparator means to said second portion of multiple pins.
Claim 13
Dependent Claim 185 words
Apparatus for testing a plurality of different digital logic assemblies each having an identical multiple pin connector, comprising: means for storing data identifying a first portion of said multiple pins as input pins, identifying a second portion of said pins as output pins, identifying a sequence of signals to be applied to said input pins, and identifying a sequence of output signals to be received from said output pins, said means comprising: a first plurality of manuaLly actuated switches each labeled to correspond with one of said multiple pins; a second plurality of manually actuated switches for designating input pins, output pins, and signal sequences; and a memory element responsive to said first and second plurality of manually actuated switches; input signal producing means; output signal comparator means; and switching means responsive to said data storing means and connected to said multiple pin connector, said input signal producing means and said output signal comparator means for connecting said input signal producing means to said identified first portion of multiple pins and for connecting said output signal comparator means to said second portion of multiple pins.
Claim 14
Dependent Claim 67 words
Apparatus for testing digital logic assemblies as defined in claim 10 additionally comprising: means for storing data identifying output signals from one of said digital logic assemblies in response to operation of said input signal producing means; and said means for storing data identifying the sequence of output signals being responsive to said stored data identifying output signals from said one of said plurality of logic assemblies.
Claim 15
Dependent Claim 29 words
Apparatus for testing a plurality of logic assemblies as defined in claim 10 wherein said memory element is removable from said apparatus to provide a separately portable storage means.
Claim 16
Dependent Claim 108 words
Apparatus for testing a plurality of logic assemblies as defined in claim 10 wherein said means for storing data identifying a sequence of output signals stores data defining the duration of a delay which precedes the operation of said output comparator means, and wherein said means for storing data identifying a sequence of input signals to be applied to said input pins stores data defining a predetermined repetition of each of said signals, said data storing means additionally comprising: a third plurality of manually actuated switches for designating predetermined time delay durations; and a fourth plurality of manually actuated switches for designating predetermined repetitions of selected input signals.
Claim 17
Dependent Claim 184 words
Apparatus for testing an electronic circuit, said circuit including a multiple input/output pin connector, comprising: a data storage medium storing an identification of a first portion of said multiple pins as input pins, a second portion of said multiple pins as output pins, a sequence of input signals to be applied to said input pins, and a sequence of correct outputs expected from said output pins in response to said input signals; a plurality of manually actuated switches, each corresponding to one of said multiple pins, connected to said data storage medium for inputting said identification and sequence data into said storage medium; a pulse producing circuit; a signal producing circuit; a comparator circuit; switching means responsive to said data storage medium for connecting said pulse producing circuit to said identified input pins in said identified sequence of input signals; switching means responsive to said data storage medium for connecting said signal producing circuit to said comparator circuit in said identified sequence of correct outputs; and switching means responsive to said data storage medium for connecting said comparator circuit to said identified output pins.
Claim 18
Dependent Claim 184 words
Apparatus for testing an electronic circuit, said circuit including a multiple input/output pin connector, comprising: a data storage medium storing an identification of a first portion of said multiple pins as input pins, a second portion of said multiple pins as output pins, a sequence of input signals to be applied to said input pins, and a sequence of correct outputs expected from said output pins in response to said input signals; a plurality of manually actuated switches, each corresponding to one of said multiple pins, connected to said data storage medium for inputting said identification and sequence data into said storage medium; a pulse producing circuit; a signal producing circuit; a comparator circuit; switching means responsive to said data storage medium for connecting said pulse producing circuit to said identified input pins in said identified sequence of input signals; switching means responsive to said data storage medium for connecting said signal producing circuit to said comparator circuit in said identified sequence of correct outputs; and switching means responsive to said data storage medium for connecting said comparator circuit to said identified output pins.
Claim 19
Independent Claim 171 words
A method of testing different digital logic circuits mounted on printed circuit boards having identical multiple pin connectors, comprising: manipulating a plurality of switches corresponding to said pin connectors to manually place in a data storage means data identifying said multiple pins for one of said logic circuits as input or output pins; manipulating a plurality of switches corresponding to said pin connectors to manually place in a data storage means data identifying a sequence of input signals for application to specified ones of said input pins; placing in a data storage means data identifying an expected sequence of outpuT signals generated by said digital logic circuit on specified ones of said output pins in response to said sequence of input signal; and applying said data stored in each of said data storage means to a signal generating and comparing circuit connected to said multiple pin connector to generate said sequence of input signals and compare said expected sequence of output signals with output signals produced by said digital logic circuit.
Claim 20
Independent Claim 171 words
A method of testing different digital logic circuits mounted on printed circuit boards having identical multiple pin connectors, comprising: manipulating a plurality of switches corresponding to said pin connectors to manually place in a data storage means data identifying said multiple pins for one of said logic circuits as input or output pins; manipulating a plurality of switches corresponding to said pin connectors to manually place in a data storage means data identifying a sequence of input signals for application to specified ones of said input pins; placing in a data storage means data identifying an expected sequence of outpuT signals generated by said digital logic circuit on specified ones of said output pins in response to said sequence of input signal; and applying said data stored in each of said data storage means to a signal generating and comparing circuit connected to said multiple pin connector to generate said sequence of input signals and compare said expected sequence of output signals with output signals produced by said digital logic circuit.
Claim 21
Dependent Claim 95 words
A method of testing different digital logic circuits as defined in claim 15 wherein said step of placing an expected sequence of output signals in a data storage means comprises the steps of: applying said data stored in said data storage means identifying multiple pins and a sequence of input signals to a signal generating circuit connected to said multiple pin connector for application of said sequence of input signals to a ''''known good'''' digital logic circuit; and placing in a data storage means data identifying the output signals received from said ''''known good'''' circuit.
Claim 22
Dependent Claim 71 words
A method of testing digital logic circuits as defined in claim 15 additionally comprising: transferring said data identifying said multiple pins, said sequence of input signals and said sequence of output signals from said data storage means to a portable data storage card; and transferring said data from said portable data storage card to a data storage means prior to applying said stored data to said signal generating and comparing circuit.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-12-01 1979-06-02 1979-12-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-12-01 1983-06-02 1983-12-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-12-01 1987-06-02 1987-12-02 $7700.00 Window Closed / Lapsed

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