Digital television display system employing coded vector graphics

Claim 2

A digital television display system having an input connected to the output of a data processor which outputs data to said display system describing the origin, slope and length of a vector to be represented, and an output connected to the input of a digital television monitor for receiving a pattern of raster illumination signals from said display system, comprising in combination: a vector segment encoder; said vector segment encoder accepting said data from said data processor, decomposing said vector into a connected sequence of vector segments, and encoding said segments as vector segment words containing coordinate, length and symbol code data; a threaded queue buffer; said threaded queue buffer accepting said vector segment words outputted from said words into threaded queues of common raster line value; an elastic refresh buffer; said elastic refresh buffer accepting said vector segment words outputted from said threaded queue buffer, storing said vector segment words in an expandable list ordered by raster line value, cyclically reading said vector words from the top of said list and cyclically outputting each word for decoding and displaying, and rewriting each vector segment word at the bottom of said list, cyclically writing at the bottom of said list in the order of Y value, new vector segment words inputted from said threaded queue buffer while suspending said cyclic reading from the top of said list, and cyclically reading from the top of said list, old vector segment words to be purged from said list while suspending said cyclic rewriting at the bottom of said list; a symbol generator; said symbOl generator accepting vector segment words cyclically outputted by said elastic refresh buffer, decoding each vector segment word, and generating a pattern of raster illumination signals corresponding to each vector segment to be displayed; a raster assembly storage; said raster assembly storage accepting from said symbol generator said outputted pattern of raster illumination signals and assembling said signals in synchronism with said cyclic operation of said elastic refresh buffer, for output to and display on said digital television monitor.

Claim 3

The digital television display system of claim 1, wherein said vector segment encoder comprises: a register means for accepting from said data processor, slope, octant, length and coordinate data for the vector to be represented; a vector length residue means for accepting from said register means said vector length data, cyclically reducing said vector length by subtracting a standard subvector length, cyclically storing said reduced vector length as a residue length, cyclically testing said residue length and cyclically outputting a length for a subvector into which said vector to be represented is decomposed; a slope modification means for accepting from said register means said slope data, cyclically storing the difference between said slope data and a standard slope for a vector segment into which said vector to be represented is decomposed, correcting an accumulated slope round-off error for selected vector segments, and cyclically outputting the modified slope of vector segments into which said vector to be represented is decomposed; a coordinate calculating means for cyclically accepting said modified slope data and said octant data and cyclically generating the coordinates for the origin of vector segments into which the vector to be represented is decomposed.

Claim 4

The digital television display system of claim 1, wherein said threaded queue buffer comprises: a queue memory means connected to a data input line for accepting data from said vector segment encoder, for storing data in threaded queues of common raster line value; an index memory means connected to an input line for accepting raster line values outputted from said vector segment encoder for storing queue pointer addresses at locations corresponding to the raster line value, said pointer addresses specifying the location in said queue memory means of the head of the corresponding thread of data; said index memory means having an input line connected to the input of said queue memory means for accessing the head of the thread for the corresponding display data stored therein; a next empty register connected to said queue memory means for storing the location of the head of the thread for the queue of empty registers in said queue memory; said queue memory means connected to an output data line for outputting display data to said elastic refresh buffer; control means connected to said next empty register and said queue memory means for reading out of said queue memory on said output line, display data stored in a data thread corresponding to said accepted raster line value in said index memory and threading the emptied location in said queue memory means by means of storing its address in said next empty register as the next head of the thread of empty locations.

Claim 5

The digital television display system of claim 1, wherein said elastic refresh buffer comprises: a wrap around memory n words in length having an input connected to an input line from said threaded queue buffer for accepting display data to be stored in serially adjacent locations in said list which is a packed data cluster; said wrap around memory being connected to an output line to said symbol generating means; a memory reading means having an output connected to an input of said memory for cyclically accessing first locations at the head of said data cluster in said memory for destructive readouT of display words stored therein to said symbol generator over said output line; a memory writing means having an output connected to the input of said memory for cyclically accessing to the input of said memory for cyclically accessing second locations at the tail of said data cluster in said memory for rewriting said storage display data words in second locations therein; control means to halt said cyclic accessing by said memory reading means when new display data is loaded from said input line into said memory at the tail of said data cluster and to halt said cyclic accessing by said memory writing means when display data stored in said memory is to be purged at the head of said data cluster.

Claim 6

In the digital television display system, of claim 1, wherein the vector segment encoder further comprises: said vector segment encoder generating a sequence of vector segment words for describing a vector to be represented as a connected sequence of vector segments selected from a symbol set of 4n vector segments, each complete vector segment having orthogonal components of magnitude of n and m, where 0 < or = m < or = n, m and n being integers; an input storage register for receiving origin, length and slope data describing the vector to be represented; said vector to be represented being oriented with the ordinate of its origin having a magnitude not less than the ordinate of its head; said slope data composed of an octant portion, a high order portion and a low order portion; said octant portion describing which of the four octants having a negative ordinate, contains the vector to be represented; said high order slope portion describing the approximate value as m/n for the tangent of the angles between the vector to be represented and the abscissa or ordinate contained in the octant designated by said octant portion, where 0 < or = m < or = n, and m and n are integers; said low order slope portion describing the difference between the value m/n of said high order slope portion and the true value of the tangent of said angle; said length portion composed of a high order portion and a low order portion; said high order length portion describing the number of complete vector segments having orthogonal components of length n lying along the ordinate or abscissa contained in the octant specified by said octant portion, required to approximate without exceeding the true length of the vector to be represented; said low order length portion describing the length l of the orthogonal component of the partial vector segment, said component lying along the ordinate or abscissa contained in the octant specified by said octant portion, said partial vector segment being the approximate vector difference between said plurality of complete vector segments and the vector to be represented, where 0 < or = l < or = n; said origin portion describing the ordinate and abscissa coordinate values for the origin of the vector to be represented; an x abscissa register and a y ordinate register gateably connected to the origin portion of said input register for storing the value of the coordinate of the origin for a first vector segment and gateably outputting said values on a first output line; a vector length residue register gateably connected to the high order length portion of said input register, for storing the remaining number of complete vector segments to be encoded for the vector to be represented; a length residue decrementing means gateably connected to said length residue register for decrementing the contents thereof by unity after each vector segment word is encoded; a length residue compare means gateably connected to said length residue register for comparing the contents therein with the value zero; and gateably connecting the low order length portion of said input register with a second output line outputtinG the l, where the contents of said length residue register is zero, or where the contents of said length residue register is greater than zero, outputting on said second output line the value n, as the length of the orthogonal component of said vector segment being encoded, said component lying along the ordinate or abscissa contained in the octant specified by the octant portion of said input register; a slope residue adder gateably connected to said low order slope portion of said input register for adding the slope residue for a present vector segment to the accumulated slope residues for previously encoded vector segments of the vector to be represented; a cummulative slope residue register gateably connected to said slope residue adder, for storing the accumulated slope residues for said previously encoded vector segments, and outputting the cummulative slope residue to said slope residue adder; a cummulative slope residue comparison means connected to said slope residue adder for comparing the cummulative slope residue with the value 0.5, incrementing the contents of said cummulative slope residue register by the slope residue when the Cummulative Slope Residue is less than 0.5 and decrementing the contents of the Cummulative Slope Residue register by 1.0 when the Cummulative Slope Residue is greater than 0.5; a modified slope adder gateably connected to said high order slope portion of said input register and connected to said Cummulative Slope Residue comparison means, for selectively modifying the slope of a vector segment being encoded from m/n to (m+1)/n when said Cummulative Slope Residue is greater than 0.5; a vector segment encoding matrix gateably connected to the output of said modified slope adder and gateably connected to the octant portion of said input register, for converting the octant data and modified slope data to one out of 4n vector segment symbol codes stored therein, to be outputted on a third output line; an arithmetic logic unit gateably connected to the output of said modified slope adder, gateably connected to said octant register, and gateably connected to said x abscissa register and said y ordinate register, for calculating the value of the coordinates for the origin for the next vector segment to be encoded by adding or subtracting the value of n to the contents of the x or the y register when x or y corresponds, respectively to the abscissa or ordinate contained in the octant designated by said octant register, and by adding or subtracting the value of the modified slope to the contents of the x or the y register when x or y does not correspond, respectively to said abscissa or ordinate contained in the octant designated by said octant register; whereby the vector to be represented is decomposed into a connected sequence of vector segments and said segments are encoded into a sequence of data words describing their origin, length and symbol code selected from a symbol set.

Claim 7

In the digital television display system of claim 1, wherein the threaded queue buffer further comprises: said threaded queue buffer accepting vector words having a random sequence of raster line locations; an index address register (IAR) connected to an address input line, for storing the inputted raster line address of the display data; an index memory connected to the output of said IAR, for storing queue pointer addresses in locations corresponding to the raster line address outputted from said IAR: an index data register (IDR) connected to the output of said index memory, for storing a queue pointer address outputted from said index memory; a queue address register (QAR) connected to the output of said index data register, for storing the queue address pointer to the head of a thread of display data stored in a queue memory, threadeD by raster address; a queue memory connected to the output of said QAR, for storing display data threaded by raster address, with the head of the thread addressable by the queue pointer address stored in the index; said IDR having an empty/not empty (E/NE) portion and a pointer portion, each portion corresponding to a category of data stored at each raster address location in the index memory; said E/NE portion of the IDR signaling whether display data is stored in the queue memory at the queue pointer address and initiating the accessing of the queue memory when a not empty signal is present; a queue data register (QDR) connected to the output of the queue memory, for storing the display data accessed from a single location in said queue memory; said QDR having an end of thread (EOT) portion, a next address portion, and a display data portion, each portion corresponding to a category of data stored at each location in said queue memory; an output line connected to the display data portion of said queue data register, for outputting one word of display data stored in the queue memory corresponding to the inputted raster location; an EOT portion of said QDR signaling whether the queue memory location accessed with the end of a thread of data corresponding to the inputted raster line address; said next address portion of said QDR containing the sequence memory location for the next data in the thread corresponding to the inputted raster line address; a temporary address register (TAR) connected to the output of the EOT and next address portions of the QDR, for temporarily storing the address of the queue memory location for the next display data in the thread corresponding to the inputted raster line address; a next empty register (NER) whose output is connected to the input of the EOT and next address portions of the QDR, for storing the queue memory location for the head of the thread of empty locations in the queue memory and outputting that location to the QDR; said QDR having its output connected to the input of said queue memory, for returning to the accessed queue memory location whose address is stored in the QAR, the address of the next empty location, the accessed queue memory location now constituting the head of the thread of empty locations; said NER input connected to the output of said QAR for transferring the accessed location in the queue memory so as to store in the NER the address of the present location of the head of the thread of empty queue memory locations; said TAR having an EOT portion signaling whether the queue memory location accessed was the end of a thread of data corresponding to the inputted raster line address; said TAR having an address portion whose output is connected to the input of the QAR for transferring to the QAR the queue memory location containing the next data in the thread corresponding to the inputted raster line address, if the EOT portion of the TAR signals that the end of the data thread has not been reached; said data portion of said QDR having its input connected to a data input line, for receiving one word of display data to be loaded into the queue memory corresponding to an inputted raster location on said address input line; said TDR input connected to the output of said index memory for storing the contents of the location accessed in the index memory by the raster location inputted on said address input line, as the present queue memory location of the head of the thread of data corresponding to said raster location; said NER having its output connected to the input of said QDR for transferring the present location of the head of the thread of empty locations in the queue memory, as the new queue pointer address for the head of the thread of display data corresponding to the input raster location, to be stored in the index memory; means for setting said E/NE poRtion of said IDR to signal that display data is stored in the queue memory at the new queue pointer address; said IDR having its output connected to the input of said index memory for transferring the new E/NE and pointer address information from the IDR to the index memory location corresponding to the inputted raster location; said NER having its output connected to the input of said QAR for accessing the present location of the head of the thread of empty locations in the queue memory; said EOT and next address portions of said QDR having an output connected to the input of said NER for transferring to the NER the address of the next empty register as the new head of the thread of empty registers in the queue memory; means for setting the EOT portion of the QDR to signal the end of the data thread if the E/NE portion of the TAR signals that no data is presently stored in the queue memory corresponding to the inputted raster location; said TAR having an output connected to the input of the next address portion of said QDR, for transferring to the QDR the previous location in the queue memory of the head of the thread of data corresponding to the inputted raster location; said new QDR contents being transferred to the queue memory by said connection between the output of said QDR to the input of said queue memory, at the location which is stored in said QAR as the new head of the thread of data corresponding to the inputted raster location.

Claim 8

In the digital television display system of claim 1, wherein the elastic refresh buffer further comprises; a wrap around memory n words in length having an input connected to an input line for accepting display data to be stored in serially adjacent locations, in a packed data cluster; a read address register having an output connected to an input of said memory for cyclically accessing first locations at the head of said data cluster in said memory for destructive readout of display words stored therein in an output display means; a write address register having an output connected to an input of said memory for cyclically accessing second locations at the tail of said data cluster in said memory for rewriting said stored display data words in second locations therein; a word counting means having an input connected to the output of said read address register and an output connected to an input of said write address register, for counting the number of display data words stored in said data cluster in said memory, adding the count modulo n, to the contents stored in said read address register, and loading the sum into said write address register; an address incrementing means having an output connected to an input of said read address register for loading the read address register with an address sequentially indexed modulo n, prior to each memory access by said read address register; means to halt said cyclic accessing by said read address register and incrementing said word counting means while cyclically accessing with said write address register when a new display data word is loaded by means of said input line, into said memory; means to halt said cyclic accessing by said write address register and decrementing said word counting means while cyclically accessing with said read address when a display data word stored in said memory is to be purged.

Claim 9

A digital television display system having an input connected to the output of a data processor which outputs data to said display system describing the origin, slope and length of a vector to be represented, comprising in combination: a vector segment encoder having an input connected to said data processing machine for accepting said origin, slope and length data, which processes said data so as to yield a sequence of vector segment words representing a sequence of component vector segments of the vector to be represented; each vector segment being a staNdardized symbol contained in a symbol set and specified by a symbol code; each vector segment word containing coordinate data specifying an (X, Y) origin, a length and a symbol code for its corresponding vector segment; a threaded queue buffer having an input connected to said vector segment encoder for accepting vector segment words having a random sequence of (X, Y) origin values, which sorts and stores said words in threaded queues of common Y value; an Elastic Refresh Buffer having an input connected to said threaded queue buffer for accepting vector segment words having a value of Y specified by the Elastic Refresh Buffer, which stores said vector segment words in a list ordered by Y; said Elastic Refresh Buffer cyclically reading vector segment words from the top of said ordered list and cyclically outputting each word for decoding and display, and rewriting each vector segment word at the bottom of said list; said Elastic Refresh Buffer cyclically writing at the bottom of said list in the order of Y value, new vector segment words inputted from said threaded queue buffer, while suspending said cyclic reading from the top of said list; said Elastic Refresh Buffer cyclically reading from the top of said list, old vector segment words to be purged from the Elastic Refresh Buffer, while suspending said cyclic rewriting at the bottom of said list; a symbol generator having an input connected to said Elastic Refresh Buffer for accepting the vector segment words cyclically outputted thereby, which decode the symbol code in each vector word from said symbol set stored therein, and generates a pattern of raster illumination signals corresponding to the vector segment to be depicted; a Partial Raster Assembly Storage having an input connected to said symbol generator for accepting said pattern of raster illumination signals and storing said pattern ordered by values of X and Y, for readout and display; said symbol generator transmitting to said Partial Raster Assembly Storage the (X, Y) origin for the vector segment to be displayed to serve as the location segment to be displayed to serve as the location address for said pattern of signals, stored in the Partial Raster Assembly Storage; said symbol generator transmitting to said Partial Raster Assembly Storage the length of the vector segment to be displayed, to serve as a signal for selectively truncating said pattern of signals stored in the Partial Raster Assembly Storage; a digital television monitor having an input connected to said Partial Raster Assembly Storage for accepting said pattern of signals stored therein, for illumination of the display; whereby the vector to be represented is displayed as a connected sequence of vector segments on a digital television monitor.

Claim 10

A digital television display system having an input connected to the output of a data processor which outputs data to said display system describing the origin, slope and length of a vector to be represented, comprising in combination: a vector segment encoder having an input connected to said data processing machine for accepting said origin, slope and length data, which processes said data so as to yield a sequence of vector segment words representing a sequence of component vector segments of the vector to be represented; each vector segment being a staNdardized symbol contained in a symbol set and specified by a symbol code; each vector segment word containing coordinate data specifying an (X, Y) origin, a length and a symbol code for its corresponding vector segment; a threaded queue buffer having an input connected to said vector segment encoder for accepting vector segment words having a random sequence of (X, Y) origin values, which sorts and stores said words in threaded queues of common Y value; an Elastic Refresh Buffer having an input connected to said threaded queue buffer for accepting vector segment words having a value of Y specified by the Elastic Refresh Buffer, which stores said vector segment words in a list ordered by Y; said Elastic Refresh Buffer cyclically reading vector segment words from the top of said ordered list and cyclically outputting each word for decoding and display, and rewriting each vector segment word at the bottom of said list; said Elastic Refresh Buffer cyclically writing at the bottom of said list in the order of Y value, new vector segment words inputted from said threaded queue buffer, while suspending said cyclic reading from the top of said list; said Elastic Refresh Buffer cyclically reading from the top of said list, old vector segment words to be purged from the Elastic Refresh Buffer, while suspending said cyclic rewriting at the bottom of said list; a symbol generator having an input connected to said Elastic Refresh Buffer for accepting the vector segment words cyclically outputted thereby, which decode the symbol code in each vector word from said symbol set stored therein, and generates a pattern of raster illumination signals corresponding to the vector segment to be depicted; a Partial Raster Assembly Storage having an input connected to said symbol generator for accepting said pattern of raster illumination signals and storing said pattern ordered by values of X and Y, for readout and display; said symbol generator transmitting to said Partial Raster Assembly Storage the (X, Y) origin for the vector segment to be displayed to serve as the location segment to be displayed to serve as the location address for said pattern of signals, stored in the Partial Raster Assembly Storage; said symbol generator transmitting to said Partial Raster Assembly Storage the length of the vector segment to be displayed, to serve as a signal for selectively truncating said pattern of signals stored in the Partial Raster Assembly Storage; a digital television monitor having an input connected to said Partial Raster Assembly Storage for accepting said pattern of signals stored therein, for illumination of the display; whereby the vector to be represented is displayed as a connected sequence of vector segments on a digital television monitor.