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US3890632A Expired / Lapsed US ⏱️ 0.0 years remaining

Stabilized semiconductor devices and method of making same

Assignee: RCA Corp
•
Filing: 1973-12-03
•
Granted: 1975-06-17
•
Expires: 1993-12-03
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Abstract

Abstract Instabilities in the leakage current and threshold voltage of a field-effect transistor (FET) on an insulator, at both room temperature and after operation at relatively high temperatures (150*C), are substantially reduced by selectively doping edge regions adjacent to the transverse side surfaces of the channel region of the FET. The selective doping comprises implanting atoms into these edge regions, as by ion implantation or diffusion, to provide therein a carrier concentration of at least 5 X 1016cm 3 atoms of the opposite conductivity type to that of the source and drain regions of the FET.

Inventors

  • 👤 William Edward Ham
  • 👤 Doris Winifred Flatley

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 15:31
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6706; H10D86/00; H10D86/01; H10D86/03; H10D99/00; Y; Y10; Y10S; Y10S148/00; Y10S148/051; Y10S148/053; Y10S148/15

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 106 words
A semiconductor device comprising: a substrate of electrically insulating material, a mesa of single crystal semiconductor material on said substrate, said mesa having side surfaces extending transversely from said substrate, means defining a field effect transistor having source and drain regions and a channel region, said channel region extending between said source and drain regions and between two of said side surfaces, and doped edge regions, in said channel region adjacent said two side surfaces of said channel region, having more conductivity modifiers than in the remainder of said channel region, said conductivity modifiers being of the same conductivity type as that of said channel region.
Claim 2
Dependent Claim 106 words
A semiconductor device comprising: a substrate of electrically insulating material, a mesa of single crystal semiconductor material on said substrate, said mesa having side surfaces extending transversely from said substrate, means defining a field effect transistor having source and drain regions and a channel region, said channel region extending between said source and drain regions and between two of said side surfaces, and doped edge regions, in said channel region adjacent said two side surfaces of said channel region, having more conductivity modifiers than in the remainder of said channel region, said conductivity modifiers being of the same conductivity type as that of said channel region.
Claim 3
Dependent Claim 75 words
A semiconductor device as described in claim 1 wherein: said mesa of semiconductor material is silicon comprising said source and drain regions of one type conductivity separated by said channel region, insulating material is over said regions, and said doped edge regions have a carrier concentration of conductivity modifiers of betweeN about 5 X 1016cm 3 and 1019cm 3, said conductivity modifiers being of a type opposite to that of said source and drain regions.
Claim 4
Dependent Claim 34 words
A semiconductor device as described in claim 2 wherein: said device is an enhancement N-channel FET and said conductivity modifiers are of a conductivity type opposite to that of said source and drain regions.
Claim 5
Dependent Claim 97 words
A semiconductor device as described in claim 1 wherein: said device is an N-channel field-effect transistor, said substrate is sapphire, said mesa of semiconductor material is P type silicon having N type source and drain regions, insulating material is over said regions, a gate electrode is on said insulating material over said channel region including said two side surfaces of said channel region, and said doped edge regions have a carrier concentration of conductivity modifiers of at least 5 X 1016cm 3 in said channel region, at least a portion of said conductivity modifiers being ion implanted.
Claim 6
Dependent Claim 42 words
A semiconductor device as described in claim 4 wherein: said gate electrode is doped polysilicon, said conductivity modifiers are of P type conductivity, whereby the threshold voltage at said doped edge regions is higher than the operating threshold voltage of said FET.

References Cited (Backward Citations)

US3394037A Cited
US3409812A Cited
US3486892A Cited
US3752711A Cited
US3789504A Cited
US3823352A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-06-16 1978-12-16 1979-06-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-06-16 1982-12-16 1983-06-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-06-16 1986-12-16 1987-06-17 $7700.00 Window Closed / Lapsed

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