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US3889109A Expired / Lapsed US ⏱️ 0.0 years remaining

Data communications subchannel having self-testing apparatus

Assignee: Bull HN Information Systems Italia SpA
•
Filing: 1973-10-01
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Granted: 1975-06-10
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Expires: 1993-10-01
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Abstract

Abstract A data communications subchannel includes apparatus for separately testing the operation of the send control logic and the receive control logic. During testing operations the subchannel is configured in a wraparound mode so that data sent from a processor is routed through the send control logic and the receive control logic back to the processor. A ''''Cyclic Redundancy Check'''' is performed on the return data to determine if any errors are present. If errors are present in the return data the send control logic and the receive control logic can be selectively bypassed to aid in determining where the errors originate. Special control signals from the processor are used to configure the subchannel into the modes which perform the error testing.

Inventors

  • 👤 Ronald W Blessin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 17:25
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/24

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 234 words
A data communications subchannel having self-testing apparatus for use with a processor, and a communications controller, a source of message characters connected to said controller and a modem, said subchannel comprising: send logic, said send logic being coupled to said controller; send control logic; means for selectively connecting said control logic between said modem and said send logic, said send control logic and said send logic transferring characters from said controller to said modem when said send control logic is connected between said modem and said send logic; receive logic; means for selectively connecting said receive logic to said send control logic in a wrap-around test mode; switch means responsive to test mode control signals from said processor for selectively bypassing said send control logic and thereby test for possible defects in said send control logic in said wrap-around test mode; receive control logic; means for selectively connecting said receive logic between said modem and said receive control logic, said receive logic and said receive control logic transferring characters from said modem to said controller when said receive logic is connected between said modem and said receive control logic; switch means responsive to test mode control signals from said processor for selecting bypassing said receive control logic and thereby test for possible defects in said receive control logic in said wrap-around test mode; and means for connecting said receive control logic to said controller.
Claim 2
Dependent Claim 234 words
A data communications subchannel having self-testing apparatus for use with a processor, and a communications controller, a source of message characters connected to said controller and a modem, said subchannel comprising: send logic, said send logic being coupled to said controller; send control logic; means for selectively connecting said control logic between said modem and said send logic, said send control logic and said send logic transferring characters from said controller to said modem when said send control logic is connected between said modem and said send logic; receive logic; means for selectively connecting said receive logic to said send control logic in a wrap-around test mode; switch means responsive to test mode control signals from said processor for selectively bypassing said send control logic and thereby test for possible defects in said send control logic in said wrap-around test mode; receive control logic; means for selectively connecting said receive logic between said modem and said receive control logic, said receive logic and said receive control logic transferring characters from said modem to said controller when said receive logic is connected between said modem and said receive control logic; switch means responsive to test mode control signals from said processor for selecting bypassing said receive control logic and thereby test for possible defects in said receive control logic in said wrap-around test mode; and means for connecting said receive control logic to said controller.
Claim 3
Dependent Claim 54 words
A data comMunications subchannel as defined in claim 1 including: first logic means for adding synchronizing characters to said message characters, said first logic means being coupled to said send control logic; second logic means for removing synchronizing characters from said message characters, said second logic means being coupled to said receive control logic.
Claim 4
Dependent Claim 67 words
A data communications subchannel as defined in claim 1 including: first means for using message characters in said send control logic to develop a first cyclic redundancy check, said first means being coupled to said send control logic; and second means for using message characters in said receive control logic to develop a second cyclic redundancy check, said second means being coupled to said send control logic.
Claim 5
Dependent Claim 81 words
A data communications subchannel as defined in claim 1 including: first means for using message characters in said send control logic to develop a first cyclic redundancy check, said first means being coupled to said send control logic; second means for using message characters in said receive control logic to develop a second cyclic redundancy check, said second means being coupled to said receive control logic; and means for comparing said first cyclic redundancy check with said second cyclic redundancy check.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-06-09 1978-12-09 1979-06-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-06-09 1982-12-09 1983-06-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-06-09 1986-12-09 1987-06-10 $7700.00 Window Closed / Lapsed

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