US3879582A
Expired / Lapsed
US
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Data loop communication system
Assignee: RCA Corp
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Filing: 1974-03-01
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Granted: 1975-04-22
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Expires: 1994-03-01
Abstract
Abstract A loop digital data communications system in which a plurality of data processing units are connected in series with each other in the loop. Each data processor has a terminal device associated therewith for providing and receiving digital signals. The loop system also includes a loop controller connected in series in the loop with the data processors. The controller provides framed time division multiplexed channels for communication between terminal devices and a loop time delay to insure that each of the data processor transmits and receives signals in a selected channel over successive frames. The data processors are arranged to handle a plurality of synchronous data rates so that terminal devices at a plurality of data rates are serviced by the loop system. In addition, the data processors include a sampling technique so that asynchronous terminal devices may also be utilized with the system.
Inventors
- 👤 Hugh Edward White
- 👤 Nicholas Frank Maxemchuk
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 17:56
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/28; H04L12/42; H04L12/437; H04L25/00; H04L25/02; H04L25/0262
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
217 words
A loop digital data communications system comprising: an electrical conductor forming at least one closed loop; a plurality of data processors electrically connected in series relation in said loop for transmitting and receiving digital information signals to and from said loop, each one of said data processors including means for transmitting and receiving said digital information signals at a selected one of a plurality of synchronous data rates; a plurality of data terminal devices each one being operatively coupled to a corresponding one of said data processors, each of said devices providing and receiving digital signals corresponding to said digital information signals, said terminal devices operating at any one of said plurality of synchronous data rates; and a loop controller connected in said loop and in series with said plurality of data processors, for providing framed time division multiplexed channels for communication between said terminal devices, through the corresponding data processors, said loop controller including means for providing a loop time delay such that each of said data processors transmits and receives said digital information signals in a selected channel over successive frames; a given data processor establishing a connection with another data processor by selecting the appropriate time division multiplexed channel, said given data processor and said other data processor operating at the same data rate.
Claim 2
Dependent Claim
217 words
A loop digital data communications system comprising: an electrical conductor forming at least one closed loop; a plurality of data processors electrically connected in series relation in said loop for transmitting and receiving digital information signals to and from said loop, each one of said data processors including means for transmitting and receiving said digital information signals at a selected one of a plurality of synchronous data rates; a plurality of data terminal devices each one being operatively coupled to a corresponding one of said data processors, each of said devices providing and receiving digital signals corresponding to said digital information signals, said terminal devices operating at any one of said plurality of synchronous data rates; and a loop controller connected in said loop and in series with said plurality of data processors, for providing framed time division multiplexed channels for communication between said terminal devices, through the corresponding data processors, said loop controller including means for providing a loop time delay such that each of said data processors transmits and receives said digital information signals in a selected channel over successive frames; a given data processor establishing a connection with another data processor by selecting the appropriate time division multiplexed channel, said given data processor and said other data processor operating at the same data rate.
Claim 3
Dependent Claim
217 words
A loop digital data communications system comprising: an electrical conductor forming at least one closed loop; a plurality of data processors electrically connected in series relation in said loop for transmitting and receiving digital information signals to and from said loop, each one of said data processors including means for transmitting and receiving said digital information signals at a selected one of a plurality of synchronous data rates; a plurality of data terminal devices each one being operatively coupled to a corresponding one of said data processors, each of said devices providing and receiving digital signals corresponding to said digital information signals, said terminal devices operating at any one of said plurality of synchronous data rates; and a loop controller connected in said loop and in series with said plurality of data processors, for providing framed time division multiplexed channels for communication between said terminal devices, through the corresponding data processors, said loop controller including means for providing a loop time delay such that each of said data processors transmits and receives said digital information signals in a selected channel over successive frames; a given data processor establishing a connection with another data processor by selecting the appropriate time division multiplexed channel, said given data processor and said other data processor operating at the same data rate.
Claim 4
Dependent Claim
217 words
A loop digital data communications system comprising: an electrical conductor forming at least one closed loop; a plurality of data processors electrically connected in series relation in said loop for transmitting and receiving digital information signals to and from said loop, each one of said data processors including means for transmitting and receiving said digital information signals at a selected one of a plurality of synchronous data rates; a plurality of data terminal devices each one being operatively coupled to a corresponding one of said data processors, each of said devices providing and receiving digital signals corresponding to said digital information signals, said terminal devices operating at any one of said plurality of synchronous data rates; and a loop controller connected in said loop and in series with said plurality of data processors, for providing framed time division multiplexed channels for communication between said terminal devices, through the corresponding data processors, said loop controller including means for providing a loop time delay such that each of said data processors transmits and receives said digital information signals in a selected channel over successive frames; a given data processor establishing a connection with another data processor by selecting the appropriate time division multiplexed channel, said given data processor and said other data processor operating at the same data rate.
Claim 5
Dependent Claim
59 words
The loop system according to claim 1 further comprising sampling means located within each of said data processors for providing communication between asynchronous terminal devices by sampling the asynchronous data rate from said asynchronous terminal device at a sampling rate substantially higher than the asynchronous data rate, said sampling rate corresponding to one of said plurality of synchronous rates.
Claim 6
Dependent Claim
98 words
The loop system according to claim 1 wherein the time division multiplexed channels provided by said loop controller comprise at least two time slots and wherein a calling data processor supplies connectivity signals in one of said at least two time slots and data signals in another of said at least two time slots, and wherein the called data processor supplies data in said one of said at least two time slots and connectivity information in said other of said at least two time slots in the channel used for communication between said calling and called data processor.
Claim 7
Dependent Claim
34 words
The system according to claim 3 wherein at least some of said plurality of data processors are assigned particular channels in said frame of time division multiplexed channels for receiving said digital information signals.
Claim 8
Dependent Claim
34 words
The system according to claim 4 wherein said loop controller includes means for subdividing each frame into a plurality of subframes, each subframe being assigned a digital synchronizing signal and a subframe address signal.
Claim 9
Dependent Claim
16 words
The system according to claim 5 wherein said electrical conductor comprises a twisted pair of wires.
Claim 10
Dependent Claim
40 words
The system according to claim 6 wherein means are provided in each of said data processors for modulating the digital information signals provided to said loop in accordance with a rule that said digital information signals comprise three voltage levels.
Claim 11
Dependent Claim
39 words
The system according to claim 7 further comprising a plurality of sub-loops, each of said sub-loops including a plurality of data processors and corresponding plurality of terminal devices, each of said sub-loops being electrically connected to said loop controller.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-04-21 | 1978-10-21 | 1979-04-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-04-21 | 1982-10-21 | 1983-04-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-04-21 | 1986-10-21 | 1987-04-22 | $7700.00 | Window Closed / Lapsed |