Combination monostable and astable inductor driver

Claim 1

In actuator apparatus employing a solenoid characterized by a relatively high ratio of required pull-in current to required holding current, a driver for operating said solenoid comprising: supply terminal means connected to said solenoid for supplying the latter with operating potential; electrically responsive, bistate switching Means connected with said terminal means for applying said potential thereto when said switching means is in a first operational state, and for interrupting application of said potential to said terminal means when said switching means is in a second, normal operational state; and control means coupled with said switching means for delivering an electrical control signal thereto in accordance with a timing program selected to provide the pull-in current requirements of said solenoid and hold the solenoid following pull-in, said control means upon activation thereof causing said switching means to initially assume said first state for a predetermined, uninterrupted time period at the outset of said program corresponding to said pull-in requirements, and thereafter cycling said switching means between said first and second states to provide a pulse width and spacing at said terminal means which supplies sufficient holding current to the solenoid, said control signal having first and second levels and said control means delivering said signal at said first level during said time period at the outset of said program and thereafter cycling said signal between said first and second levels to cause said switching means to assume said first and second states thereof respectively in response to said first and second levels of the signal, said control means including first capacitor means, charging and discharging circuit means connected with said first capacitor means, operating means responsive to predetermined minimum and maximum voltages developed across said first capacitor means for causing the latter to charge via said circuit means when the voltage across said first capacitor means falls to said minimum, and to discharge via said circuit means when said voltage rises to said maximum, and output means for delivering said control signal at said first level during charging of the first capacitor means and at said second level during discharge thereof, whereby said first capacitor means, charging and discharging circuit means, and operating means control said pulse width and spacing at said terminal means to provide a predetermined duty cycle following said uninterrupted time period at the outset of said program, said control means being provided with second capacitor means of substantial capacitance, and means electrically connecting said second capacitor means with said circuit means during charging operation thereof but electrically isolating said second capacitor means therefrom during discharging operation of said circuit means, whereby upon said activation of the control means both the first and second capacitor means charge over a time duration terminating when said voltage reaches said maximum, said time duration defining said uninterrupted time period at the outset of said program.