US3838414A
Expired / Lapsed
US
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Digital wave synthesizer
Assignee: Motorola Solutions Inc
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Filing: 1972-08-03
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Granted: 1974-09-24
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Expires: 1992-08-03
Abstract
Abstract A digital wave synthesizer provides an output waveform of frequency f in response to an input of periodic pulses from a clock source at a frequency of 2nf. The periodic pulses are received by a simple binary counter of n stages which provides n outputs, each from one stage, in a time sequence in accordance with the count of the counter. A code converter receives each of the n outputs from the counter and also the periodic pulses, combines them and provides 2n unique output signals. An output circuit comprised of a resistive ladder network receives the 2n output signals and provides 2n voltage signals at predetermined levels which, in sequential occurrence, produce the symmetrical waveform output.
Inventors
- 👤 M Wiles
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 11:48
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/02; G06F1/022; H; H03; H03K; H03K4/00; H03K4/02; H03K4/026
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
300 words
A digital wave synthesizer adapted to receive periodic pulses from a pulse generated source, such pulses occurring at a frequency of 2nf for providing a symmetrical waveform output at a frequency f, comprising: a. a unidirectional binary counter of n stages, having an input to receive the periodic pulses for providing output signals on n output lines; b. a code converter for receiving n output signals from the counter and the periodic pulses for providing 2n output signals in a predetermined sequential manner; c. output means for receiving the 2n output signals from the code converter and for responding to each of the 2n output signals to form the symmetrical waveform output; d. said output means further comprising a resistive ladder network having 2n resistances connected together at one end to a voltage reference source and separated at the other end to receive each of the 2n output signals of the code converter for providing 2n voltage signals at levels predetermined by the values of each of the 2n resistances, which in sequential occurrence produce the symmetrical waveform output; e. said code converter including decoder means for receiving and combining the n output signals of the counter and the periodic pulses for providing n output signals and the reciprocals thereof; f. combining means adapted to receive and combine the n output signals and reciprocals thereof from the decoder for producing the 2n output signals; and g. the decoder means further comprising n Exclusive-NOR circuits and n inverter circuits, the n Exclusive-NOR circuits being adapted to receive and combine the n outputs from the counter and the periodic pulses, and each providing an output to the combining means and to a respective one of the inverter circuits, each of the n inverter circuits for providing an output to the combining means.
Claim 2
Dependent Claim
300 words
A digital wave synthesizer adapted to receive periodic pulses from a pulse generated source, such pulses occurring at a frequency of 2nf for providing a symmetrical waveform output at a frequency f, comprising: a. a unidirectional binary counter of n stages, having an input to receive the periodic pulses for providing output signals on n output lines; b. a code converter for receiving n output signals from the counter and the periodic pulses for providing 2n output signals in a predetermined sequential manner; c. output means for receiving the 2n output signals from the code converter and for responding to each of the 2n output signals to form the symmetrical waveform output; d. said output means further comprising a resistive ladder network having 2n resistances connected together at one end to a voltage reference source and separated at the other end to receive each of the 2n output signals of the code converter for providing 2n voltage signals at levels predetermined by the values of each of the 2n resistances, which in sequential occurrence produce the symmetrical waveform output; e. said code converter including decoder means for receiving and combining the n output signals of the counter and the periodic pulses for providing n output signals and the reciprocals thereof; f. combining means adapted to receive and combine the n output signals and reciprocals thereof from the decoder for producing the 2n output signals; and g. the decoder means further comprising n Exclusive-NOR circuits and n inverter circuits, the n Exclusive-NOR circuits being adapted to receive and combine the n outputs from the counter and the periodic pulses, and each providing an output to the combining means and to a respective one of the inverter circuits, each of the n inverter circuits for providing an output to the combining means.
Claim 3
Dependent Claim
81 words
A digital wave synthesizer adapted to receive periodic pulses from a pulse generated source, such pulses occurring at a frequency of 2nf for providing a symmEtrical waveform output at a frequency f as in claim 1 wherein: a. said combining means further comprise 2n NAND circuits each adapted to receive a total of n outputs from the Exclusive-NOR circuits and from the n inverter circuits in a combination unique to each of the NAND circuits for producing the 2n output signals.
Claim 4
Dependent Claim
245 words
A digital wave synthesizer adapted to receive periodic pulses from a pulse generated source, such pulses occurring at a frequecy of 2nf for providing a symmetrical waveform output at a frequency f comprising: a. a unidirectional ripple binary counter of n stages, having an input to receive the periodic pulses and having an n output line from respective ones of said n stages for providing n output signals; b. a code converter having 2n output lines for receiving the n output signals from the unidirectional binary ripple counter and the periodic pulses and combining them to form n signals and their reciprocals and for combining said n signals and their reciprocals for providing 2n output signals in a one out of 2n format whereby each said outline is energized sequentially in an order begining with line 1 going to line 2n and then going from line 2n to line 1; c. output means for receiving the 2n output signals from the code converter and for responding to each of the 2n output signals to form the symmetrical waveform output; and d. said output means further comprising a resistive ladder network having 2n resistances connected together at one end to a voltage source and at their other ends separately to receive respectively the 2n output signals of the code converter for providing 2n voltage signals at levels predetermined by the values of each of the 2n resistances, which in sequential occurrence produce the symmetrical waveform output.
Claim 5
Dependent Claim
245 words
A digital wave synthesizer adapted to receive periodic pulses from a pulse generated source, such pulses occurring at a frequecy of 2nf for providing a symmetrical waveform output at a frequency f comprising: a. a unidirectional ripple binary counter of n stages, having an input to receive the periodic pulses and having an n output line from respective ones of said n stages for providing n output signals; b. a code converter having 2n output lines for receiving the n output signals from the unidirectional binary ripple counter and the periodic pulses and combining them to form n signals and their reciprocals and for combining said n signals and their reciprocals for providing 2n output signals in a one out of 2n format whereby each said outline is energized sequentially in an order begining with line 1 going to line 2n and then going from line 2n to line 1; c. output means for receiving the 2n output signals from the code converter and for responding to each of the 2n output signals to form the symmetrical waveform output; and d. said output means further comprising a resistive ladder network having 2n resistances connected together at one end to a voltage source and at their other ends separately to receive respectively the 2n output signals of the code converter for providing 2n voltage signals at levels predetermined by the values of each of the 2n resistances, which in sequential occurrence produce the symmetrical waveform output.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-09-23 | 1978-03-25 | 1978-09-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-09-23 | 1982-03-25 | 1982-09-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-09-23 | 1986-03-25 | 1986-09-24 | $7700.00 | Window Closed / Lapsed |