Biological signals monitor

Claim 2

In a fetal heart rate monitor having a pickup for electrical signals received through the body of the mother, and means for providing an output relating to fetal heart rate, input circuitry means defining a signal processing path and responsive to said pickup for producing along said path a signal train including first signals representing maternal heart beats and second signals representing fetal heart beats, some of said first signals also representing fetal heart beats which occurred simultaneously with maternal heartbeats, removal means for removing from said path at least the major portions of said first signals, whereby blank spaces are left by such removal of those of said first signals representing fetal heart beats which occurred simultaneously with maternal heart beats and circuitry means defining a phase lock loop having a frequency and including means responsive to the thus modified train of signals for generating fetal heart rate signals related to said frequency, said phase lock loop including means responsive to the spacing characteristics between said signals in said modified train for estimating fetal heart rate during the occurrence of said blank spaces in said modified train, said circuitry means defining said phase lock loop including means for producing repeating windows spaced to overlap a fetal signal on the basis of past spacing statistics despite variation within predetermined limits, said circuitry means further including updating means for detecting the position of successive fetal signals within the respective windows and for varying future windows spacing on the basis of the detected position of the signals in the windows.

Claim 3

The fetal heart rate monitor of claim 1 wherein means are provided for producing, at said phase lock loop, a train of digital signals, each representing a fetal QRS complex, including means for disabling said updating means upon the occurrence of no pulse or more than one pulse in said window, thereby continuing the use of the past spacing setting.

Claim 4

The fetal heart rate monitor of claim 2 wherein said updating means includes means to relocate the next window upon the occurrence of a single pulse in the present window by pulse shift of the past spacing in the event no single pulse appeared in the last preceding window.

Claim 5

The fetal heart rate monitor of claim 2 wherein said updating means includes means to relocate the next window upon the occurrence of a single pulse in the present window by alteration of the loop frequency in the event a single pulse appeared in the last preceding window.

Claim 6

The fetal heart rate monitor of claim 2 wherein said updating means includes means to relocate the next window upon the occurrence of single pulses in two successive Windows by alteration of the loop frequency so that the corresponding altered window period is between the window period prior to said alteration and the spacing between said two single pulses.

Claim 7

The fetal heart rate monitor of claim 1 including a counter, means for incrementing said counter upon the occurrence of signals outside said window and means for decrementing said counter upon the occurrence of signals inside said window, including means for weighing more heavily in said count the signals outside said window and means for resetting said phase lock loop upon the occurrence of a count greater than a predetermined value.

Claim 8

The fetal heart rate monitor of claim 1 further comprising circuitry means defining a second signal processing path and for transmitting along said second path third signals representing maternal heart beats, said removal means having a connection to said circuitry means defining said second path and being responsive to occurrence of said third signals in said second path.

Claim 9

The fetal heart rate monitor of claim 7 including in said circuitry means defining said second path, preceding said connection, an automatic threshold means for generating from a signal derived from a maternal QRS complex a signal representative thereof.

Claim 10

The fetal heart rate monitor of claim 8 including as said threshold means a peak detector including means for fixing predetermined limit and for storing a value less than said limit and allowing said stored value to decay over time, and a comparator effectively connected to said peak detector and to said circuit means defining said second path for generating an output signal when a signal in said second path exceeds the decayed value of the preceding peak stored in said detector.

Claim 11

The fetal heart monitor of claim 9 including a monostable multivibrator effectively connected to said comparator foor energization upon the occurrence of said output signal, said monostable multi-vibrator having a time constant substantially corresponding to the maximum width of the maternal QRS complex.

Claim 12

The fetal heart rate monitor of claim 7 wherein there is included in said circuitry means defining said first path an automatic threshold means for generating from a fetal QRS complex wave a signal representative thereof.

Claim 13

The fetal heart rate monitor of claim 11 including as said threshold means a peak detector including means for fixing a predetermined limit and for storing a value greater than said limit and allowing said stored value to decay over time, and a comparator effectively connected to said peak detector and to said circuitry defining said first path for generating an output signal when a signal exceeds the decayed value of the preceding peak stored in said detector.

Claim 14

The fetal heart rate monitor of claim 12 including means in said first path effectively connected to said comparator and responsive to signals in said second path for removing output signals from said comparator which coincide in time with a maternal QRS complex, thereby to remove portions of maternal signals present in the output of said comparator.

Claim 15

The monitor of claim 1 wherein said phase lock loop is digital.

Claim 16

In a monitor having a pickup for a first electrical signal representing a first component of a recurring complex biological signal including a second component that is stronger than the first component, and output circuitry means including means for providing an output related to occurrences of said first component, circuitry means defining a signal processing path in which said first signals are detected and along part of which second signals representing occurrences of said second component are transmitted, and automatic thresholding means in said path for tracking the magnitude of signals other than said second signals and providing an output to said output circuitry means signifying the occurrence of said first component only upon receipt of a signal other than a said second signal aNd of magnitude bearing a predetermined relationship to the magnitude of the next previously tracked signal but being independent of signals tracked prior to said next previously tracked signal.

Claim 17

In a monitor having a pickup for a first electrical signal representing a first component of a recurring complex biological signal including a second component that is stronger than the first component, and output circuitry means including means for providing an output related to occurrences of said first component, circuitry means defining a signal processing path in which said first signals are detected and along part of which second signals representing occurrences of said second component are transmitted, and automatic thresholding means in said path for tracking the magnitude of signals other than said second signals and providing an output to said output circuitry means signifying the occurrence of said first component only upon receipt of a signal other than a said second signal aNd of magnitude bearing a predetermined relationship to the magnitude of the next previously tracked signal but being independent of signals tracked prior to said next previously tracked signal.

Claim 18

The monitor of claim 15 further comprising circuitry means defining a second signal processing path and for transmitting therealong, in timed relationship to said transmission of said second signals along said first path, third signals representing said occurrences of said second component, and means for detecting said third signals and, in response to said detection, for preventing effective response by said automatic thresholding means to said second signals.

Claim 19

The monitor of claim 16 for use in monitoring the rate of fetal heartbeats, wherein said pickup includes a plurality of electrodes for placement on the mother in separate positions respectively optimizing the pickup of maternal and fetal QRS complex signals, and said circuitry means defining said paths includes separate preamplification means effectively connected to said electrodes for respectively receiving and amplifying said maternal and fetal signals, whereby said first and second signal paths are separate at their front ends.

Claim 20

The monitor of claim 16 wherein said second path includes automatic thresholding means for tracking signal magnitude and providing an output to said automatic thresholding means in said first path signifying the occurrence of said second component only upon receipt of a signal of magnitude bearing a predetermined relationship to previously tracked signal magnitude.

Claim 21

The monitor of claim 15 wherein said automatic thresholding means includes means for storing and decaying over time the peak value of a received signal, and a comparator effectively connected to said means for storing, said comparator including means for providing said output when a received signal is greater than a predetermined percentage of the decayed value presently stored.

Claim 22

The monitor of claim 19 wherein means are provided for fixing said predetermined percentage at 70-90 percent.

Claim 23

The monitor of claim 19 wherein said means for storing includes means for preventing the value stored therein from decaying below a limit, including means for establishing said limit.

Claim 24

The monitor of claim 21 wherein said means for establishing said limit includes means for monitoring the past history of signals reaching said automatic thresholding means and for varying said limit in accordance with said history.

Claim 25

The monitor of claim 21 wherein said means for establishing said limit includes means for fixing said limit.

Claim 26

The monitor of claim 15 further comprising removal means for removing at least the major portions of said second signals from said path, while leaving leading edges of said second signals, delay means for receiving signals from said removal circuitry, including signals representing said leading edges, and means for excluding from the effective output of said delay means said signals representing said leading edges.

Claim 27

The monitor of claim 24 further comprising means for detecting the falling edges of said first signals and for causing said output of said delay means to be responsive to the occurrences of said falling edges.

Claim 28

In a fetal heart rate monitor, electrode means for picking up electrical signals corresponding to fetal QRS complex signals, signal processing circuitry means effectively connected to said electrode means and including a pre-amplifier for receiving said electrical signals from said electrode means, a filter for the amplified signals, said filter having Q less than 10 and including means to provide an output in which at least 25 percent of the signal energy is in the 50-100 Hz range, exclusive of line frequency noise, and a notch filter for removing said line frequency noise, and means effectively connected to said signal processing circuitry for providing an output relating to Fetal heart rate.

Claim 29

In a fetal heart rate monitor, electrode means for picking up electrical signals corresponding to fetal QRS complex signals, signal processing circuitry means effectively connected to said electrode means and including a pre-amplifier for receiving said electrical signals from said electrode means, a filter for the amplified signals, said filter having Q less than 10 and including means to provide an output in which at least 25 percent of the signal energy is in the 50-100 Hz range, exclusive of line frequency noise, and a notch filter for removing said line frequency noise, and means effectively connected to said signal processing circuitry for providing an output relating to Fetal heart rate.

Claim 30

The monitor of claim 26 comprising automatic thresholding means effectively connected between said filters and said readout for tracking signal magnitude and providing an output signalling the occurrence of a fetal QRS complex only upon receipt of a signal of magnitude bearing a predetermined relationship to previously tracked signal magnitude, said thresholding means including means for determining said relationship.

Claim 31

The monitor of claim 27 further comprising additional signal processing means for electrical signals corresponding to maternal QRS complex signals, and means connected in the signal path leading to said automatic thresholding means for preventing at least the major portion of electrical signals corresponding to maternal QRS complex signals from reaching said automatic thresholding means, said means for preventing being responsive to detection of said electrical signals processed by said additional signal processing means.

Claim 32

The monitor of claim 26 wherein said processing circuitry from said electrode means through said filter includes means to provide linear processing of input signals.

Claim 33

In a fetal heart rate monitor having a pickup for electrical signals received through the body of the mother, and output circuitry means including means for providing an output relating to fetal heart rate, input circuitry means defining a signal processing path and responsive to said pickup for producing along said path a signal train including first signals representing maternal heart beats and second signals representing fetal heart beats, some of said first signals also representing fetal heart beats which occurred simultaneously with maternal heart beats, removal means for removing from said path at least the major portions of said first signals, whereby blank spaces are left by such removal of those of said first signals representing fetal heart beats which occurred simultaneously with maternal heart beats, circuitry means defining a phase lock loop having a frequency and including means responsive to the thus modified train of signals for generating and providing to said output circuitry means fetal heart rate signals related to said frequency, said phase lock loop including means responsive to the spacing characteristics between said signals in said modified train for estimating fetal heart rate during the occurrence of said blank spaces in said modified train, and circuitry means defining a second signal processing path and for transmitting along said second path third signals representing maternal heart beats, said removal means having a connection to said circuitry means defining said second path and being responsive to occurrence of said third signals in said second path, said circuitry means defining said second path including, preceding said connection, input means for a maternal QRS complex signal, a notch filter for removing line frequency noise, and a band pass filter having Q less than 10 and a center frequency between 15 Hz and 25 Hz.

Claim 34

In a fetal heart rate monitor having a pickup for electrical signals received through the body of the mother, and output circuitry means including means for providing an output relating to fetal heart rate, input circuitry means defining a signal processing path and responsive to said pickup for producing along said path a signal train including first signals representing maternal heart beats and second signals representing fetal heart beats, some of said first signals also representing fetal heart beats which occurred simultaneously with maternal heart beats, removal means for removing from said path at least the major portions of said first signals, whereby blank spaces are left by such removal of those of said first signals representing fetal heart beats which occurred simultaneously with maternal heart beats, circuitry means defining a phase lock loop having a frequency and including means responsive to the thus modified train of signals for generating and providing to said output circuitry means fetal heart rate signals related to said frequency, said phase lock loop including means responsive to the spacing characteristics between said signals in said modified train for estimating fetal heart rate during the occurrence of said blank spaces in said modified train, and circuitry means defining a second signal processing path and for transmitting along said second path third signals representing maternal heart beats, said removal means having a connection to said circuitry means defining said second path and being responsive to occurrence of said third signals in said second path, said circuitry means defining said second path including, preceding said connection, input means for a maternal QRS complex signal, a notch filter for removing line frequency noise, and a band pass filter having Q less than 10 and a center frequency between 15 Hz and 25 Hz.

Claim 35

In a fetal heart rate monitor having a pickup for electrical signals received through the body of the mother, and output circuitry means including means for providing an output relating to fetal heart rate, input circuitry means defining a signal processing path and responsive to said pickup for producing along said path a signal train including first signals representing maternal heart beats and second signals representing fetal heart beats, some of said first signals also representing fetal heart beats which occurred simultaneously with maternal heart beats, removal means for removing from said path at least the major portions of said first signals, whereby blank spaces are left by such removal of those of said first signals representing fetal heart beats which occurred simultaneously with maternal heart beats, circuitry means defining a phase lock loop having a frequency and including means responsive to the thus modified train of signals for generating and providing to said output circuitry means fetal heart rate signals related to said frequency, said phase lock loop including means responsive to the spacing characteristics between said signals in said modified train for estimating fetal heart rate during the occurrence of said blank spaces in said modified train, and circuitry means defining a second signal processing path and for transmitting along said second path third signals representing maternal heart beats, said removal means having a connection to said circuitry means defining said second path and being responsive to occurrence of said third signals in said second path, said circuitry means defining said first path including, preceding said connection, input means for a fetal QRS complex signal, a notch filter for removing line frequency noise, and a band pass filter having Q less than 10 and a center frequency between 25 Hz and 40 Hz.

Claim 36

In a fetal heart rate monitor having a pickup for electrical signals received through the body of the mother, and output circuitry means including means for providing an output relating to fetal heart rate, input circuitry means defining a signal processing path and responsive to said pickup for producing along said path a signal train including first signals representing maternal heart beats and second signals representing fetal heart beats, some of said first signals also representing fetal heart beats which occurred simultaneously with maternal heart beats, removal means for removing from said path at least the major portions of said first signals, whereby blank spaces are left by such removal of those of said first signals representing fetal heart beats which occurred simultaneously with maternal heart beats, circuitry means defining a phase lock loop having a frequency and including means responsive to the thus modified train of signals for generating and providing to said output circuitry means fetal heart rate signals related to said frequency, said phase lock loop including means responsive to the spacing characteristics between said signals in said modified train for estimating fetal heart rate during the occurrence of said blank spaces in said modified train, and circuitry means defining a second signal processing path and for transmitting along said second path third signals representing maternal heart beats, said removal means having a connection to said circuitry means defining said second path and being responsive to occurrence of said third signals in said second path, said circuitry means defining said first path including, preceding said connection, input means for a fetal QRS complex signal, a notch filter for removing line frequency noise, and a band pass filter having Q less than 10 and a center frequency between 25 Hz and 40 Hz.

Claim 37

In a fetal heart rate monitor having a pickup for signals emanating from the fetus, input circuitry means responsive to said pickup for producing a signal train including signals representing fetal heart beats, prediction circuitry means responsive to said input circuitry for predicting occurrences of said signals representing fetal heart beats, based upon past occurrences of such signals in said train, and output circuitry means responsive of said input and prediction circuitry means for providing an output relating to fetal heart rate, said output circuitry means including means for basing said output on said signals representing fetal heart beats when such signals occur within a predetermined range of predicted occurrences thereof and for otherwise basing said output on said predicted occurrences, said prediction circuitry means including means for basing said predictions at least in part upon selected previous predictions upon which said output was based.

Claim 38

In a fetal heart rate monitor having a pickup for signals emanating from the fetus, input circuitry means responsive to said pickup for producing a signal train including signals representing fetal heart beats, prediction circuitry means responsive to said input circuitry for predicting occurrences of said signals representing fetal heart beats, based upon past occurrences of such signals in said train, and output circuitry means responsive of said input and prediction circuitry means for providing an output relating to fetal heart rate, said output circuitry means including means for basing said output on said signals representing fetal heart beats when such signals occur within a predetermined range of predicted occurrences thereof and for otherwise basing said output on said predicted occurrences, said prediction circuitry means including means for basing said predictions at least in part upon selected previous predictions upon which said output was based.

Claim 39

The improvement of claim 32 wherein said prediction circuitry means includes means for referring the phase of a said predicted occurrence to the next previous said predicted occurrence if said output was based thereupon, and otherwise to the next previous said signal representing a fetal heart beat upon which said output was based.

Claim 40

The improvement of claim 32 wherein said output circuitry includes means for basing said output upon a said predicted occurrence whenever more than one pulse in said signal train occurs within said predetermined range of said predicted occurrence.

Claim 41

In a monitor having a pickup for a first electrical signal representing a first component of a recurring complex biological signal including a second component that is stronger than the first component, input circuitry means responsive to said pickup for producing a signal train including signals representing occurrences of said first component, prediction circuitry means responsive to said input circuitry for predicting occurrences of said signals representing occurrences of said first component, based upon past occurrences of such signals in said train, and output circuitry means responsive to said input and prediction circuitry means for providing an output related to occurrences of said first component, said output circuitry means including means for basing said output on said signals representing occurrences of said first component when said signals occur within a predetermined range of predicted occurrences thereof and for otherwise basing said output on said predicted occurrences, said prediction circuitry means including means for basing said predictions at least in part upon selected previous predictions upon which said output was based.

Claim 42

In a monitor having a pickup for a first electrical signal representing a first component of a recurring complex biological signal including a second component that is stronger than the first component, input circuitry means responsive to said pickup for producing a signal train including signals representing occurrences of said first component, prediction circuitry means responsive to said input circuitry for predicting occurrences of said signals representing occurrences of said first component, based upon past occurrences of such signals in said train, and output circuitry means responsive to said input and prediction circuitry means for providing an output related to occurrences of said first component, said output circuitry means including means for basing said output on said signals representing occurrences of said first component when said signals occur within a predetermined range of predicted occurrences thereof and for otherwise basing said output on said predicted occurrences, said prediction circuitry means including means for basing said predictions at least in part upon selected previous predictions upon which said output was based.

Claim 43

In a fetal heart rate monitor having a pickup for signals emanating from the fetus, input circuitry means responsive to said pickup for producing a signal train including signals representing fetal heart beats with attendant noise signals and with some heart Beats unrepresented in the signal train, prediction circuitry means responsive to said input circuitry for predicting occurrences of said signals representing fetal heart beats, based upon past occurrences of such signals in said train, and output circuitry means responsive to said input and prediction circuitry means for providing an output relating to fetal heart rate, said prediction circuitry means including means for repeatedly producing a window overlapping the predictable point in time of the next heart beat based upon past occurrences, said output circuitry means responsive to a signal occurring in a window to treat said signal as a detected heart beat and agjust the output according to the position of the signal in the signal train, said output circuitry means further including means for disregarding as noise any signals occurring outside of said window, means causing said prediction circuitry to continue to operate when a heart beat is not detected in a window to produce a window for the next succeeding heart beat, said window having a duration sized to overlap a fetal heart beat signal in the presence of a predetermined amount of predicted change in fetal heart rate which may occur over a plurality of heart beat intervals.

Claim 44

In a fetal heart rate monitor having a pickup for signals emanating from the fetus, input circuitry means responsive to said pickup for producing a signal train including signals representing fetal heart beats with attendant noise signals and with some heart Beats unrepresented in the signal train, prediction circuitry means responsive to said input circuitry for predicting occurrences of said signals representing fetal heart beats, based upon past occurrences of such signals in said train, and output circuitry means responsive to said input and prediction circuitry means for providing an output relating to fetal heart rate, said prediction circuitry means including means for repeatedly producing a window overlapping the predictable point in time of the next heart beat based upon past occurrences, said output circuitry means responsive to a signal occurring in a window to treat said signal as a detected heart beat and agjust the output according to the position of the signal in the signal train, said output circuitry means further including means for disregarding as noise any signals occurring outside of said window, means causing said prediction circuitry to continue to operate when a heart beat is not detected in a window to produce a window for the next succeeding heart beat, said window having a duration sized to overlap a fetal heart beat signal in the presence of a predetermined amount of predicted change in fetal heart rate which may occur over a plurality of heart beat intervals.

Claim 45

The monitor of claim 36 wherein said output circuitry includes means for disregarding as noise occurrences of multiple signals in a single window.

Claim 46

The monitor of claim 36 wherein the duration of each said window is approximately one half of a predicted fetal heart beat interval.

Claim 47

The monitor of claim 38 wherein said prediction circuitry establishes the duration of said windows based upon the duration of the currently predicted heart beat interval.

Claim 48

In a monitor having input circuitry means including a pickup for a train of signals, including true and false signals, representative of a selected component of quasi-periodic, complex physiological electrical signals, signal-to-signal spacing being variable, and output circuitry means including means for providing an output relating to real and expected occurrences of said component: means for receiving said train of signals from said input circuitry means; window means responsive to said input circuitry means for producing windows spaced in accordance with the previous history of said train of signals for enabling said receiving means to effectively receive said signals only during an interval prescribed by each said window; and output means coupled to said receiving means and window means for producing and providing to said output circuitry output signals indicative of real and expected occurrences of true quasi-periodic signals occurring in said train.

Claim 49

In a monitor having input circuitry means including a pickup for a train of signals, including true and false signals, representative of a selected component of quasi-periodic, complex physiological electrical signals, signal-to-signal spacing being variable, and output circuitry means including means for providing an output relating to real and expected occurrences of said component: means for receiving said train of signals from said input circuitry means; window means responsive to said input circuitry means for producing windows spaced in accordance with the previous history of said train of signals for enabling said receiving means to effectively receive said signals only during an interval prescribed by each said window; and output means coupled to said receiving means and window means for producing and providing to said output circuitry output signals indicative of real and expected occurrences of true quasi-periodic signals occurring in said train.

Claim 50

The monitor of claim 40, further comprising: quality means responsive to said input circuitry means and said window means for providing a quality signal indicative of the occurrence of true signals relative to false signals from said train of signals; and control means responsive to said quality means for controlling the operation of said window means in accordance with said quality signal.

Claim 51

The monitor of claim 41, wherein: said quality means includes counter means for counting signals occurring between said windows; and said control means operates to reset said window means to its initial condition in the event the number of such counts exceeds a predetermined magnitude.

Claim 52

In a monitor having input circuitry means including a pickup for recurrent complex electrical physiological signals having a first component weaker than a second component and in the presence of extraneous recurrent noise signals, and output circuitry means including means for providing an output relating to occurrences of said first component, processing circuitry means coupled to said input and output circuitry means and comprising: band pass filter means having a Q under 10 for passing signals having a frequency content spanning the maximum energy in said first component; Notch filter means for excluding extraneous noise of a selected frequency; and automatic threshold means responsive to said filtered first component for excluding signals below a threshold determined as a function of previously received filtered first component signals to produce and provide to said output circuitry means a train of signals representative of said first component.

Claim 53

In a monitor having input circuitry means including a pickup for recurrent complex electrical physiological signals having a first component weaker than a second component and in the presence of extraneous recurrent noise signals, and output circuitry means including means for providing an output relating to occurrences of said first component, processing circuitry means coupled to said input and output circuitry means and comprising: band pass filter means having a Q under 10 for passing signals having a frequency content spanning the maximum energy in said first component; Notch filter means for excluding extraneous noise of a selected frequency; and automatic threshold means responsive to said filtered first component for excluding signals below a threshold determined as a function of previously received filtered first component signals to produce and provide to said output circuitry means a train of signals representative of said first component.

Claim 54

In a monitor having a pickup for electrical signals representing occurrences of at least a component of a recurring complex biological signal, input circuitry means responsive to said pickup for producing a signal train including said signals representing said occurrences, prediction circuitry means responsive to said input circuitry means for making predictions of said occurrences based upon past history of said signals in said train, output circuitry means responsive to said input and prediction circuitry means for providing an output relating to occurrences of said component, including elements for basing said output upon said predictions under predetermined circumstances, quality circuitry means for determining deviation of said signals from said predictions and thereby evaluating the reliability of said output, and restart circuitry means for reinitiating derivation of said predictions when said quality means indicates a predetermined degree of unreliability.

Claim 55

In a monitor having a pickup for electrical signals representing occurrences of at least a component of a recurring complex biological signal, input circuitry means responsive to said pickup for producing a signal train including said signals representing said occurrences, prediction circuitry means responsive to said input circuitry means for making predictions of said occurrences based upon past history of said signals in said train, output circuitry means responsive to said input and prediction circuitry means for providing an output relating to occurrences of said component, including elements for basing said output upon said predictions under predetermined circumstances, quality circuitry means for determining deviation of said signals from said predictions and thereby evaluating the reliability of said output, and restart circuitry means for reinitiating derivation of said predictions when said quality means indicates a predetermined degree of unreliability.

Claim 56

In the monitor of claim 44, output disabling means for preventing output when said quality means indicates a predetermined degree of unreliability, including means for requiring a higher reliability to permit output during said reinitiation than when said reinitiation is completed.

Claim 57

The monitor of claim 44 wherein the restart circuitry means includes means for requiring a higher degree of reliability for acceptance of an attempted reinitiation than the reliability required when said reinitiation is completed.