US3796929A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Junction isolated integrated circuit resistor with crystal damage near isolation junction
Assignee: Koninklijke Philips NV
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Filing: 1971-12-02
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Granted: 1974-03-12
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Expires: 1991-12-02
Abstract
Abstract The present invention provides an improvement of the voltage linearity of a resistor in a semiconductor device by implanting neutral ions of suitable energy in a semiconductor body to introduce neutral ions and crystal lattice damage in the vicinity of a p-n junction therein to reduce the effective mobility of majority charge carriers in the vicinity of the junction.
Inventors
- 👤 K Nicholas
- 👤 R Ford
- 👤 J Beale
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 18:44
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/43; H10P; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/061; Y10S438/00; Y10S438/904
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
187 words
A semiconductor integrated circuit device comprising a semiconductor body having adjacent a surface plural sites for accommodating circuit elements, each of said sites comprising a first region of one conductivity type forming with a body portion of the opposite conductivity type a p-n junction, means for contacting the said first region at one of said sites to provide the circuit function of a resistor, whereby when a voltage is applied to the contacts a measured resistance as a function of applied voltage characteristic is obtained which is non-linear as a result of charge carriers being lost at the depletion layer associated with the p-n junction, and means for rendering the said voltage characteristic more linear, said last-named means consisting essentially of such a high concentration of implanted neutral ions and resultant semiconductor crystal lattice damage in the said first region adjacent the said p-n junction at said one site that the charge carrier effective mobility is reduced thereat to a value less than one-third the value that exists in a comparably doped first region at another of said sites but which is free of implanted neutral ions.
Claim 2
Dependent Claim
187 words
A semiconductor integrated circuit device comprising a semiconductor body having adjacent a surface plural sites for accommodating circuit elements, each of said sites comprising a first region of one conductivity type forming with a body portion of the opposite conductivity type a p-n junction, means for contacting the said first region at one of said sites to provide the circuit function of a resistor, whereby when a voltage is applied to the contacts a measured resistance as a function of applied voltage characteristic is obtained which is non-linear as a result of charge carriers being lost at the depletion layer associated with the p-n junction, and means for rendering the said voltage characteristic more linear, said last-named means consisting essentially of such a high concentration of implanted neutral ions and resultant semiconductor crystal lattice damage in the said first region adjacent the said p-n junction at said one site that the charge carrier effective mobility is reduced thereat to a value less than one-third the value that exists in a comparably doped first region at another of said sites but which is free of implanted neutral ions.
Claim 3
Dependent Claim
33 words
A device as set forth in claim 1 wherein the reduced charge carrier effective mobility is at least one order of magnitude below the value at the other site free of implanted ions.
Claim 4
Dependent Claim
23 words
A device as set forth in claim 2 wherein the resistor exhibits a high negative temperature coefficient of resistance exceeding about -103 ppm/*C.
Claim 5
Dependent Claim
55 words
A device as set forth in claim 2 wherein the said first region at said one site contains a concentration of one-type forming impurities decreasing in value from the surface to the p-n junction, and also contains a concentration of the implanted neutral ions that has a maximum in the vicinity of the p-n junction.
Claim 6
Dependent Claim
26 words
A device as set forth in claim 1 wherein the said first region at said one site has a sheet resistance of at least 30 Kohms/sq.
Claim 7
Dependent Claim
24 words
A semiconductor device as set forth in claim 1, wherein the implanted neutral ions have a peak concentration immediately below the said p-n junction.
Claim 8
Dependent Claim
24 words
A semiconductor device as set forth in claim 1, whereiN the semiconductor material is silicon, and the neutral ions are of tin or silicon.
Claim 9
Dependent Claim
122 words
A semiconductor device comprising a semiconductor body, a region of one conductivity type present adjacent a surface of the body, a portion of the body being of the opposite conductivity type and forming a p-n junction with the said one-type region, the said one-type region having a high sheet resistance, and means for contacting said one-type region to provide the circuit function of a resistor, said resistor having a high voltage linearity as a result of such a high concentration of implanted neutral ions and resultant semiconductor crystal lattice damage present in the said one-type region at least in the vicinity of the said p-n junction that the temperature coefficient of the resistor has a highly negative value of approximately 4,000 p.p.m./*C.
Claim 10
Dependent Claim
122 words
A semiconductor device comprising a semiconductor body, a region of one conductivity type present adjacent a surface of the body, a portion of the body being of the opposite conductivity type and forming a p-n junction with the said one-type region, the said one-type region having a high sheet resistance, and means for contacting said one-type region to provide the circuit function of a resistor, said resistor having a high voltage linearity as a result of such a high concentration of implanted neutral ions and resultant semiconductor crystal lattice damage present in the said one-type region at least in the vicinity of the said p-n junction that the temperature coefficient of the resistor has a highly negative value of approximately 4,000 p.p.m./*C.
Claim 11
Dependent Claim
22 words
A semiconductor device as set forth in claim 8, wherein said one-type region has a sheet resistance of at least 20 K.ohms/square.
Claim 12
Dependent Claim
18 words
A semiconductor device as set forth in claim 8, wherein the neutral ions are of an inert gas.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-03-11 | 1977-09-10 | 1978-03-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-03-11 | 1981-09-10 | 1982-03-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-03-11 | 1985-09-10 | 1986-03-12 | $7700.00 | Window Closed / Lapsed |