Method of fabricating a semiconductor device
Abstract
Abstract DISCLOSED IS A METHOD FOR FORMING A STRUCTURE HAVING ADJACENT CLOSELY SPACED ELECTRODES COPLANAR WITH THE SURFACE OF A SUBSTRATE AND ELECTRICALLY INSULATED THEREFROM. A FIRST LAYER OF METAL IS DEPOSITED TO OVERLIE A PASSIVATED SURFACE OF A SEMICONDUCTOR SUBSTRATE. THE LAYER OF METAL IS PATTERNED TO DEFINE A SET OF ELECTRODES AND A BUS BAR IS FORMED TO CONNECT THE VARIOUS ELECTRODES TO A VOLTAGE SOURCE. THE EXPOSED SURFACE LAYER OF EACH ELECTRODE IS ANODIZED TO FORM AN INSULATING LAYER THEREOVER. THE BUS BAR IS SUBSEQUENTLY REMOVED. A SECOND LAYER OF METAL IS FORMED OVER THE FIRST SET OF ELECTRODES AND THE EXPOSED SURFACE OF THE SUBSTRATE BETWEEN ADJACENT ELECTRODES. THE SECOND LAYER OF METAL PATTERNED TO DEFINE A SECOND SET OF ELECTRODES WHICH ARE SEPARATED FROM THE FIRST SET OF ELECTRODES WHICH ARE SEPARATED FROM THE FIRST SET OF ELECTRODES BY ONLY THE THICKNESS OF THE ANODIZED OXIDE LAYER. IN ONE ASPECT OF THE INVENTION, THE METHOD IS UTILIZED TO FABRICATE A CHARGE COUPLED DEVICE.
Inventors
- 👤 D Collins
- 👤 Mahon W Mc
Bibliographic Details
Claims Analysis
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