US3739374A
Expired / Lapsed
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Digital sweep generator for generating analog signals
Assignee: MANDREL IND INC US
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Filing: 1971-08-27
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Granted: 1973-06-12
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Expires: 1991-08-27
Abstract
Abstract A digital sweep generator for digitally generating an analog since wave signal of constant or varying (sweep) frequency, includes means for generating a rate-of-change clock, a slope clock and a sine function, via digital circuits. The rate-ofchange clock determines the rate-of-change in the frequency of a sinewave across a desired range of frequencies for a given time interval. The slope clock occurs at the exact increments selected to produce a given sinewave frequency as determined by the rateof-change clock. That is, if a sweep sinewave signal is desired, the rate-of-change clock is introduced to modify accordingly the means for generating the slope clock. The slope clock is then introduced to the means for generating a sine function to digitally produce the sinewave signal as the function of the input slope clock rate. Each slope clock represents a point on the slope of the generated sinewave, corresponding to equal increments of 360* of a sinewave. Two outputs are provided; a digital word corresponding to the sinewave, and the analog sinewave signal delivered therefrom via a digital-to-analog converter.
Inventors
- 👤 J Kiowski
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 19:13
CPC Classifications
G; G01; G01V; G01V1/00; G01V1/02; G01V1/04; G06; G06F; G06F1/00; G06F1/02; G06F1/03; G06F1/035; G06F1/0353; H; H03; H03B; H03B2200/00; H03B2200/006; H03B2200/0092
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
172 words
A digital sinewave generator for providing an analog sinewave signal comprising the combination of; master oscillator means for generating a pair of master clocks defined as an interval register (IR) clock and a time period register (TPR) clock; rate-of-change clock generator means coupled to the IR clock and including first divide logic means for generating a zero carryout pulse defining a rate-of-change clock; slope clock generator means coupled to the TPR clock and to said rate-of-change clock, including second divide logic means for generating a zero carry-out pulse defining a slope clock; digital sine function generator means coupled to the slope clock and including complementary circuit means to produce a digital word representative of a full 360* sinewave corresponding to a cycle of the analog sinewave signal, wherein the instantaneous frequency of the sinewave is dependent upon the rate-of-change clock introduced to the slope clock generator means, and digital to analog means coupled to the digital sine function generator means to generate the analog sinewave signal in response to the digital word.
Claim 2
Dependent Claim
172 words
A digital sinewave generator for providing an analog sinewave signal comprising the combination of; master oscillator means for generating a pair of master clocks defined as an interval register (IR) clock and a time period register (TPR) clock; rate-of-change clock generator means coupled to the IR clock and including first divide logic means for generating a zero carryout pulse defining a rate-of-change clock; slope clock generator means coupled to the TPR clock and to said rate-of-change clock, including second divide logic means for generating a zero carry-out pulse defining a slope clock; digital sine function generator means coupled to the slope clock and including complementary circuit means to produce a digital word representative of a full 360* sinewave corresponding to a cycle of the analog sinewave signal, wherein the instantaneous frequency of the sinewave is dependent upon the rate-of-change clock introduced to the slope clock generator means, and digital to analog means coupled to the digital sine function generator means to generate the analog sinewave signal in response to the digital word.
Claim 3
Dependent Claim
8 words
The digital sinewave generator of claim 1 wherein
Claim 4
Dependent Claim
98 words
The digital sinewave generator of claim 2 wherein the slope clock generator means further comprises, frequency register means having a selected binary number and a clocking rate determined by the rate-of-change clock from the rate-of-change clock generator means; divide logic means coupled to the frequency register means; time period register means coupled to the divide logic means and having a selected clocking rate determined by the TPR clock from the master oscillator means; said divide logic means generating the slope clock in response to the clocking rate of the time period register means and the frequency register means.
Claim 5
Dependent Claim
69 words
The digital sinewave generator of claim 3 wherein the digital sine function generator means further comprises; slope counter means for receiving the slope clock from the slope clock generator means; slope generator means coupled to the slope counter meanS and including a read only memory containing the sine function from 0* to 90*, and complementary circuit means to provide a digital word representing the sinewave from 181* through 360*.
Claim 6
Dependent Claim
167 words
The digital sinewave generator of claim 4 disposed to generate an analog sinewave signal which sweeps through a selected range of frequencies, wherein the rate-of-change clock generator means provides a varying rate-of-change across the selected range of frequencies for a given time interval and further comprises; time input means for introducing a binary number corresponding to said given time interval of the sinewave; range input means for introducing a binary number corresponding to the selected range of frequencies of the sinewave; divide logic means coupled to the time input means and range input means; interval register means coupled to the divide logic means and having a selected clocking rate determined by the IR clock from the master oscillator means, said divide logic means and interval register means providing a division of the range into the time of the sweep multiplied by the IR frequency and the resolution; wherein the divide logic means delivers the rate-of-change clock in response to the clocking rate of the interval register means.
Claim 7
Dependent Claim
56 words
The digital sinewave generator of claim 5 wherein the digital sine function generator means further includes taper generating means operatively coupled to the slope counter means and the slope generator means for varying the amplitude between maximum and zero of at least one end of the generated sweep signal delivered from the sine function generator means.
Claim 8
Dependent Claim
105 words
The digital sinewave generator of claim 6 wherein the taper generating means further includes taper logic means coupled between the slope counter means and the slope generator means to produce an address which produces a selected sine function for the taper; wherein the slope counter means provides a slope sine function in response to the slope clock; a taper generator circuit coupled to the slope generator means to add the slope sine function to the taper sine function; a slope register means coupled to the taper generator circuit to temporarily store the output; and said digital-to-analog converter means is coupled to the slope register means.
Claim 9
Dependent Claim
141 words
The digital sinewave generator of claim 7 wherein the time input means includes a series of digital gates; said divide logic means includes first adder means coupled to the digital gates, second adder means coupled to said range input means, and flip-flop means coupled to the output of the first adder means; said interval register means including first and second counter means coupled to the first and second adder means respectively and adapted to subtract the binary number of the range input means to provide a remainder in the interval register means; wherein the zero carryout pulse defining the rate-of-change clock is introduced to the flip-flop means when the remainder in the first and second counter means is less than the binary number of the range input means, said flip-flop means enabling the digital gates via generation of the rate-of-change clock.
Claim 10
Dependent Claim
130 words
The digital sinewave generator of claim 8 further including start frequency means; wherein the frequency register means includes up/down counter means coupled to the start frequency means, up/down gate means coupled to the rate-of-change clock and thence to the up/down counter means; said second divide logic means includes third adder means coupled to the up/down counter means and adapted to subtract the binary number in the frequency register means to provide a remainder in the time period register means; said time period register means includes third counter means coupled to the third adder means; wherein the carryout pulse corresponding to said slope clock is generated via the third adder means when the remainder in the time period register means is less thAn the binary number of the frequency register means.
Claim 11
Dependent Claim
95 words
The digital sinewave generator of claim 7 wherein the taper logic means includes adder means coupled to the slope counter means; taper counter means also coupled to the adder means via a series of digital gates, said digital gates being coupled to the slope clock; said taper generator circuit includes a pair of registers coupled to a pair of respective adders to add the slope and taper sine functions from the slope counter means and the tape counter means; and the slope register means includes a pair of registers coupled to the pair of adders.
Claim 12
Dependent Claim
137 words
A digital sine function generator for generating a full 360* sinewave of selected frequency comprising the combination of; means for providing an input clock whose rate is the product of the selected frequency times selected increments within the desired sinewave which correspond to the resolution; counter means disposed to receive the input clock to digitally reference each selected increment at the corresponding intervals of the desired sinewave frequency in response to the input clock; word generator means coupled to the counter means, including a read only memory containing the sine function from 0* thru 90*; said word generator means further including complementary circuit means operatively coupled to the read only memory for generating a digital word representative of 181* through 360* of the sinewave from the 0* to 90* sine function retained in the read only memory.
Claim 13
Dependent Claim
137 words
A digital sine function generator for generating a full 360* sinewave of selected frequency comprising the combination of; means for providing an input clock whose rate is the product of the selected frequency times selected increments within the desired sinewave which correspond to the resolution; counter means disposed to receive the input clock to digitally reference each selected increment at the corresponding intervals of the desired sinewave frequency in response to the input clock; word generator means coupled to the counter means, including a read only memory containing the sine function from 0* thru 90*; said word generator means further including complementary circuit means operatively coupled to the read only memory for generating a digital word representative of 181* through 360* of the sinewave from the 0* to 90* sine function retained in the read only memory.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-06-11 | 1976-12-11 | 1977-06-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-06-11 | 1980-12-11 | 1981-06-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-06-11 | 1984-12-11 | 1985-06-12 | $7700.00 | Window Closed / Lapsed |