US3735273A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Offset signal correction system
Assignee: Individual
•
Filing: 1972-04-06
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Granted: 1973-05-22
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Expires: 1992-04-06
Abstract
Abstract A system for correcting offset in analog signal generator output is responsive to simple pulse signal request for correction. A bistable circuit is set upon receiving the correction request and thereupon enables a coincidence circuit to gate pulses to a counter. The counter output is converted by a digital-to-analog converter whose output signal is combined subtractively with the offset signal. Upon nulling of the offset signal the bistable circuit is reset.
Inventors
- 👤 D Wright
- 👤 G Fisher
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 14:49
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
184 words
A system for correcting offset signal output of an analog signal generator, comprising: a. signal summation circuit means having a first input terminal receiving signals generated by said signal generator, a second input terminal and an output terminal; b. an offset correction controller operable to provide an offset correction control signal; c. bistable circuit means providing a first output signal on occurrence of said control signal and alternately providing a second output signal on occurrence of a signal of predetermined character at said summation circuit means output terminal; d. a pulse generator; e. coincidence circuit means enabled to conduct therethrough successive pulses generated by said pulse generator on coincident occUrrence of said bistable circuit means first output signal and said control signal and disabled on occurrence of said bistable circuit means second output signal; f. a pulse counter providing a digital output signal indicative of the number of said successive pulses conducted through said coincidence circuit means; and g. converter circuit means generating a signal indicative of said counter digital output signal and applying said signal to said summation circuit means second input terminal.
Claim 2
Independent Claim
184 words
A system for correcting offset signal output of an analog signal generator, comprising: a. signal summation circuit means having a first input terminal receiving signals generated by said signal generator, a second input terminal and an output terminal; b. an offset correction controller operable to provide an offset correction control signal; c. bistable circuit means providing a first output signal on occurrence of said control signal and alternately providing a second output signal on occurrence of a signal of predetermined character at said summation circuit means output terminal; d. a pulse generator; e. coincidence circuit means enabled to conduct therethrough successive pulses generated by said pulse generator on coincident occUrrence of said bistable circuit means first output signal and said control signal and disabled on occurrence of said bistable circuit means second output signal; f. a pulse counter providing a digital output signal indicative of the number of said successive pulses conducted through said coincidence circuit means; and g. converter circuit means generating a signal indicative of said counter digital output signal and applying said signal to said summation circuit means second input terminal.
Claim 3
Dependent Claim
53 words
The system claimed in claim 1 wherein said signal of predetermined character at said summation circuit means output terminal is a zero voltage crossover signal, said bistable circuit means including a nonlinear amplifier circuit providing a first and alternate second output signals respectively on non-occurrence and occurrence of said zero voltage crossover signal.
Claim 4
Dependent Claim
40 words
The system claimed in claim 2 wherein said bistable circuit means further includes a multivibrator circuit responsive to said control signal and to said nonlinear amplifier second output signal in generating said bistable circuit means first and second output signals.
Claim 5
Dependent Claim
59 words
The system claimed in claim 3 wherein said multivibrator circuit comprises first and second NAND gates, said first gate being operatively responsive to said nonlinear amplifier and to said second gate, said second gate being operatively responsive to said first gate and to said control signal, said second gate generating said bistable circuit means first and second output signals.
Claim 6
Dependent Claim
42 words
The system claimed in claim 1 wherein said summation circuit means includes an amplifier circuit, first and second input resistors connected to the input of said amplifier circuit and separately connected respectively to said summation circuit means first and second input terminals.
Claim 7
Dependent Claim
17 words
The system claimed in claim 1 wherein said analog signal generator comprises a clinical data signal generator.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-05-21 | 1976-11-20 | 1977-05-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-05-21 | 1980-11-20 | 1981-05-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-05-21 | 1984-11-20 | 1985-05-22 | $7700.00 | Window Closed / Lapsed |