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US3717871A Expired / Lapsed US ⏱️ 0.0 years remaining

Keyboard input device

Assignee: Omron Corp
•
Filing: 1971-11-26
•
Granted: 1973-02-20
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Expires: 1991-11-26
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Abstract

Abstract A keyboard input device wherein means is provided for obtaining an inhibit signal to prevent the entry of unnecessary input signals resulting from keys operated in such a way that during depression of one key another key is singly or repeatedly operated. According to the present invention, the inhibit signal obtaining means essentially comprises a combination of a plurality of AND gates.

Inventors

  • 👤 K Urasaki
  • 👤 I Hatano
  • 👤 A Nagano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 11:56
CPC Classifications
H; H03; H03M; H03M11/00; H03M11/20

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 238 words
In a keyboard input device including ( M X N ) pairs of first and second contact points of keyboard switches operatively associated with the corresponding number of keys disposed on a keyboard wherein M and N are respectively integers and each pair of which is adapted to be closed upon depression of the corresponding one of said keys, said first and second contact points being connected with ( M + N ) sets of storing means for storing a pair of input signals indicative of depression of any selected one of said keys through M and N connection lines of first and second groups, the improvement comprising: a plurality of first AND gates, each associated with said storing means; a pair of input terminals, one of which is connected with an output terminal of said storing means and one of said keyboard switches and a second AND gate adapted to receive a signal from one of said first AND gates associated with the first group of M connection lines and a signal from one of said first AND gates associated with the second group of N connection lines, said second mentioned signal being passed through a delay circuit, said second AND gate being capable of generating, upon receipt of said first and second mentioned signals, an inhibit signal which may be used to prevent the entry of an unnecessary input signal to the following stage of circuitry.
Claim 2
Dependent Claim 238 words
In a keyboard input device including ( M X N ) pairs of first and second contact points of keyboard switches operatively associated with the corresponding number of keys disposed on a keyboard wherein M and N are respectively integers and each pair of which is adapted to be closed upon depression of the corresponding one of said keys, said first and second contact points being connected with ( M + N ) sets of storing means for storing a pair of input signals indicative of depression of any selected one of said keys through M and N connection lines of first and second groups, the improvement comprising: a plurality of first AND gates, each associated with said storing means; a pair of input terminals, one of which is connected with an output terminal of said storing means and one of said keyboard switches and a second AND gate adapted to receive a signal from one of said first AND gates associated with the first group of M connection lines and a signal from one of said first AND gates associated with the second group of N connection lines, said second mentioned signal being passed through a delay circuit, said second AND gate being capable of generating, upon receipt of said first and second mentioned signals, an inhibit signal which may be used to prevent the entry of an unnecessary input signal to the following stage of circuitry.
Claim 3
Dependent Claim 238 words
In a keyboard input device including ( M X N ) pairs of first and second contact points of keyboard switches operatively associated with the corresponding number of keys disposed on a keyboard wherein M and N are respectively integers and each pair of which is adapted to be closed upon depression of the corresponding one of said keys, said first and second contact points being connected with ( M + N ) sets of storing means for storing a pair of input signals indicative of depression of any selected one of said keys through M and N connection lines of first and second groups, the improvement comprising: a plurality of first AND gates, each associated with said storing means; a pair of input terminals, one of which is connected with an output terminal of said storing means and one of said keyboard switches and a second AND gate adapted to receive a signal from one of said first AND gates associated with the first group of M connection lines and a signal from one of said first AND gates associated with the second group of N connection lines, said second mentioned signal being passed through a delay circuit, said second AND gate being capable of generating, upon receipt of said first and second mentioned signals, an inhibit signal which may be used to prevent the entry of an unnecessary input signal to the following stage of circuitry.
Claim 4
Dependent Claim 238 words
In a keyboard input device including ( M X N ) pairs of first and second contact points of keyboard switches operatively associated with the corresponding number of keys disposed on a keyboard wherein M and N are respectively integers and each pair of which is adapted to be closed upon depression of the corresponding one of said keys, said first and second contact points being connected with ( M + N ) sets of storing means for storing a pair of input signals indicative of depression of any selected one of said keys through M and N connection lines of first and second groups, the improvement comprising: a plurality of first AND gates, each associated with said storing means; a pair of input terminals, one of which is connected with an output terminal of said storing means and one of said keyboard switches and a second AND gate adapted to receive a signal from one of said first AND gates associated with the first group of M connection lines and a signal from one of said first AND gates associated with the second group of N connection lines, said second mentioned signal being passed through a delay circuit, said second AND gate being capable of generating, upon receipt of said first and second mentioned signals, an inhibit signal which may be used to prevent the entry of an unnecessary input signal to the following stage of circuitry.
Claim 5
Dependent Claim 36 words
The improvement according to claim 1, which further comprises a inhibit signal processing circuit adapted to receive said inhibit signal, to thereby inhibit the entry of an unnecessary input signal to the following stage of circuitry.
Claim 6
Dependent Claim 26 words
The improvement according to claim 1, wherein said keyboard switches are associated with the corresponding number of keys disposed on a keyboard of an electronic calculator.
Claim 7
Dependent Claim 184 words
In a keyboard input device including M X N pairs of first and second contact points of keyboard switches correspondingly connected with a number of keys disposed on a keyboard, wherein M and N are integers and each pair of contact points iS closed upon the depression of a respective one of said keys, said first and second contact points being connected with ( M + N ) sets of storing means for storing a pair of input signals representative of the depression of a selected one of said keys through M and N conductors of first and second groups, and a set of output terminals for receiving the outputs of said storing means to be supplied to further processing circuitry, the improvement comprising: error prevention means, responsive to the depression of a selected one of said keys, for enabling the supply of output signals from only one of said storing means to said output terminals, said one storing means corresponding to that storing means receiving input signals corresponding to said selected key which has been depressed when no other keys have been depressed.
Claim 8
Dependent Claim 184 words
In a keyboard input device including M X N pairs of first and second contact points of keyboard switches correspondingly connected with a number of keys disposed on a keyboard, wherein M and N are integers and each pair of contact points iS closed upon the depression of a respective one of said keys, said first and second contact points being connected with ( M + N ) sets of storing means for storing a pair of input signals representative of the depression of a selected one of said keys through M and N conductors of first and second groups, and a set of output terminals for receiving the outputs of said storing means to be supplied to further processing circuitry, the improvement comprising: error prevention means, responsive to the depression of a selected one of said keys, for enabling the supply of output signals from only one of said storing means to said output terminals, said one storing means corresponding to that storing means receiving input signals corresponding to said selected key which has been depressed when no other keys have been depressed.
Claim 9
Dependent Claim 45 words
The improvement according to claim 4, further including inhibiting circuit means, responsive to the output of said error prevention means, for inhibiting the storage of a signal representative of the depression of one of said keys during the enabling operation of said error prevention means.
Claim 10
Dependent Claim 130 words
The improvement according to claim 4, wherein said error prevention means comprises a plurality of first AND gates, each of which is connected to a respective one of said storing means, a pair of input terminals, one of which is connected with an output terminal of said storing means and one of said keyboard switches, and a second AND gate, one input of which is connected to the output of said storing means associated with the group of M conductors and a second input of which is connected to the output of said storing means associated with the group of N conductors through a delay circuit, the output of said second AND gate providing a signal for enabling said supply of output signals from only one of said storing means.
Claim 11
Dependent Claim 110 words
The improvement according to claim 5, wherein said inhibiting circuit means comprises a first inverter circuit, a read-only memory, a counter, and a read-on signal generator connected in series the input of said first invertor circuit being connected to the output of said error prevention means, and further including a pair of storage control AND gates, each having a common input connected to the output of said read-on signal generator, and respective inputs connected to receive storage signals to be supplied to said storing means, the outputs of said storage control AND gates being connected to said storing means of said ( M + N ) sets of storing means.
Claim 12
Dependent Claim 34 words
The improvement according to claim 7, wherein the output of said counter is connected to said read-only memory and said read-only memory further includes a control input terminal for receiving a control signal therefor.
Claim 13
Dependent Claim 116 words
The improvement according to claim 4, wherein each of said storing means comprises a flip-flop circuit, including an input AND gate for receiving both said input signals of said pair, a first NOR gate connected in common to one of the inputs of said input AND gate, a second NOR gate having a pair of inputs which are respectively connected to the output of said input AND gate and said first NOR gate, and a pair of series coupled switching circuits connected between the output of said second NOR gate and the output of said flip-flop for supplying an output signal from said flip-flop and being connected through an invertor circuit to said first NOR gate.
Claim 14
Dependent Claim 21 words
The improvement according to claim 9, wherein said pair of series coupled switching circuits are coupled through an additional invertor circuit.
Claim 15
Dependent Claim 130 words
The improvement according to claim 5, wherein said error prevention means comprises a plurality of first AND gates, each of which is connected to a respective one of said storing means, a pair of input terminals, one of which is connected with an output terminal of said storing means and one of said keyboard switches, and a second AND gate, one input of which is connecTed to the output of said storing means associated with the group of M conductors and a second input of which is connected to the output of said storing means associated with the group of N conductors through a delay circuit, the output of said second AND gate providing a signal for enabling said supply of output signals from only one of said storing means.
Claim 16
Dependent Claim 110 words
The improvement according to claim 11, wherein said inhibiting circuit means comprises a first inverter circuit, a read-only memory, a counter, and a read-on signal generator connected in series the input of said first invertor circuit being connected to the output of said error prevention means, and further including a pair of storage control AND gates, each having a common input connected to the output of said read-on signal generator, and respective inputs connected to receive storage signals to be supplied to said storing means, the outputs of said storage control AND gates being connected to said storing means of said ( M + N ) sets of storing means.
Claim 17
Dependent Claim 116 words
The improvement according to claim 11, wherein each of said storing means comprises a flip-flop circuit, including an input AND gate for receiving both said input signals of said pair, a first NOR gate connected in common to one of the inputs of said input AND gate, a second NOR gate having a pair of inputs which are respectively connected to the output of said input AND gate and said first NOR gate, and a pair of series coupled switching circuits connected between the output of said second NOR gate and the output of said flip-flop for supplying an output signal from said flip-flop and being connected through an invertor circuit to said first NOR gate.
Claim 18
Dependent Claim 116 words
The improvement according to claim 12, wherein each of said storing means comprises a flip-flop circuit, including an input AND gate for receiving both said input signals of said pair, a first NOR gate connected in common to one of the inputs of said input AND gate, a second NOR gate having a pair of inputs which are respectively connected to the output of said input AND gate and said first NOR gate, and a pair of series coupled switching circuits connected between the output of said second NOR gate and the output of said flip-flop for supplying an output signal from said flip-flop and being connected through an invertor circuit to said first NOR gate.
Claim 19
Dependent Claim 21 words
The improvement according to claim 14, wherein said pair of series coupled switching circuits are coupled through an additional invertor circuit.
Claim 20
Dependent Claim 34 words
The improvement according to claim 15, wherein the output of said counter is connected to said read-only memory and said read-only memory further includes a control input terminal for receiving a control signal therefor.

References Cited (Backward Citations)

US3662378A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-02-20 1976-08-21 1977-02-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-02-20 1980-08-21 1981-02-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-02-20 1984-08-21 1985-02-20 $7700.00 Window Closed / Lapsed

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