Priority access system

Claim 2

A selEction circuit for connecting each of N inputs, N > OR = 2, to a single output at least once during a predetermined reference time interval comprising first means for selecting at least once during said reference interval each of a plurality of predetermined groups of said inputs, said plurality of groups comprising all of said N inputs, and second means for connecting each input in a selected group to said output in a predetermined manner.

Claim 3

connecting each input in a selected group to said output in a predetermined manner.

Claim 4

connecting each input in a selected group to said output in a predetermined manner.

Claim 5

The circuit of claim 1 wherein said groups are mutually exclusive, said inputs being included in respective groups in accordance with a desired priority structure, inputs in a given group each having the same priority, and wherein said first means comprises means for selecting a particular group a predetermined number of times during said reference interval, which number is uniquely associated with said particular group and is determined by the relative priority associated with said particular group.

Claim 6

The circuit of claim 1 wherein the totality of inputs in the ith group (i 1,2,3, . . . , m) is determined to require ni connections to said output during said reference interval, each of said connections continuing for not more than a period of time indicated by ti and wherein said means for selecting a particular group comprises means for selecting the ith group a number of times given approximately by (niti)/(niti)min, (niti)min being the minimum value of niti over all values of i.

Claim 7

The circuit of claim 2 wherein said means for selecting a particular group comprises a first counter for indicating the group currently selected, and a second counter for indicating the number of times during said reference interval that said currently selected group has been selected.

Claim 8

The circuit of claim 4 further comprising means for generating a first advance signal whenever each input in said currently selected group has been connected to said output, and means for applying said first advance signal to said second counter to increase the count of said second counter.

Claim 9

The circuit of claim 4 further comprising means for generating a second advance signal whenever said second counter indicates that said particular group has been selected said predetermined number of times, means for applying said second advance signal to said first counter to increase the count of said second counter, and means for applying said second advance signal to said second counter to reset said second counter to an initialized state.

Claim 10

The circuit of claim 1 wherein said second means comprises means for sequentially selecting each input in a selected group to said output.

Claim 11

The circuit of claim 6 wherein said second means comprises means for sequentially selecting each input in a selected group to said output.

Claim 12

The circuit of claim 8 wherein said means for sequentially selecting comprises a memory having a plurality of locations for storing in groups of successive locations information identifying the inputs associated with corresponding groups of inputs, said memory also storing information indicating which input in each group of inputs is the last input in that group to be connected to said output, means for accessing said information in said memory under the control of applied selection signals, a third counter for generating selection signals indicating the memory location containing the information identifying a current input to be connected to said output, and means responsive to information accessed from said memory for connecting said current input to said output.

Claim 13

The circuit of claim 9 further comprising means for generating a first signal whenever it is determined that said current input has completed its required period of connection to said output, means for generating a second signal whenever the period of connectioN for said current input to said output is equal to or greater than the value ti, where said current input is included in the ith group of inputs, and means for advancing the count of said third counter in response to either of said first or second signals.

Claim 16

The method of claim 11 wherein said groups are mutually exclusive, said inputs being included in respective groups in accordance with a desired priority structure, inputs in a given group each having the same priority, and wherein said step (1) comprises selecting a particular group a predetermined number of times during said reference interval, which number is uniquely associated with said particular group and is determined by the relative priority associated with said particular group.

Claim 17

The method of claim 11 wherein the totality of inputs in the ith group (i 1,2,3,. . . ,m) is determined to require ni connections to said output during said reference interval, each of said connections continuing for not more than a period of time indicated by ti and wherein said selecting of a particular group comprises selecting the ith group a number of times given approximately by (niti)/(niti)min, (niti)min being the minimum value of niti over all values of i.

Claim 18

The method of claim 11 wherein said step (2) comprises sequentially selecting each input in a selected group to said output.