US3699722A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Precision polishing of semiconductor crystal wafers
Assignee: Radiation Inc
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Filing: 1970-11-23
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Granted: 1972-10-24
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Expires: 1990-11-23
Abstract
Abstract A method of polishing semiconductor crystal wafers in which a planar array of wafers is rotated about an axis normal to its plane while rotating a polishing surface in contact with a face of each wafer of the array in the same sense as the sense of rotation of the array, about an axis displaced from and parallel to the axis of rotation of the array. The wafer is displaced from the polishing surface at locations closest and furthest from the axis of rotation to eliminate the extremes of rotational velocity.
Inventors
- 👤 Jimmy L Davidson
- 👤 George V Rouse
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 18:34
CPC Classifications
B; B24; B24B; B24B37/00; B24B37/04; B24B37/07; B24B37/10; B24B37/102
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
215 words
A method of polishing semiconductor wafers, which comprises rotating a plurality of wafers mounted in a symmetrical array in a common plane about the axis of symmetry of said array, independently rotating an annular polisher in the same rotational sense about the axis thereof displaced from and parallel to the axis of rotation of said wafer array, moving the wafer array and a parallel plane polishing surface of said annular polisher having a width substantially less than the lineal extent of said wafer array relative to one another to produce contact between said plane surface and a face of each of said wafers, for continuously polishing each said wafer face as the wafer array and the plane surface undergo relative rotation except along a substantial area of each said wafer face which becomes displaced from said plane surface during the two portions of each cycle of rotation of said wafer array when the respective wafer lies along the line intersecting both of said axes of rotation in the locations closest to and furthest from the axis of rotation of the annular polisher, to eliminate polishing of the wafers at the two extremes of relative rotational velocity of said wafer array and said plane surface and thereby to obtain more uniform polishing of each wafer face.
Claim 2
Independent Claim
215 words
A method of polishing semiconductor wafers, which comprises rotating a plurality of wafers mounted in a symmetrical array in a common plane about the axis of symmetry of said array, independently rotating an annular polisher in the same rotational sense about the axis thereof displaced from and parallel to the axis of rotation of said wafer array, moving the wafer array and a parallel plane polishing surface of said annular polisher having a width substantially less than the lineal extent of said wafer array relative to one another to produce contact between said plane surface and a face of each of said wafers, for continuously polishing each said wafer face as the wafer array and the plane surface undergo relative rotation except along a substantial area of each said wafer face which becomes displaced from said plane surface during the two portions of each cycle of rotation of said wafer array when the respective wafer lies along the line intersecting both of said axes of rotation in the locations closest to and furthest from the axis of rotation of the annular polisher, to eliminate polishing of the wafers at the two extremes of relative rotational velocity of said wafer array and said plane surface and thereby to obtain more uniform polishing of each wafer face.
Claim 3
Dependent Claim
20 words
The method of claim 1, wherein the wafer array and the plane polishing surface are rotated at different angular velocities.
Claim 4
Dependent Claim
246 words
A process for polishing the main faces of semiconductor wafers to a smooth flat finish, which comprises mounting a plurality of said wafers in an array on a common circle of centers on the planar surface of a flat holder so that the faces of said wafers to be polished lie in a substantially common plane to the extent possible with deviations in thickness and flatness of the mounted wafers, disposing the faces of said wafers to be polished in confronting relationship to the planar surface of an annular polisher disposed parallel to said planar surface of said holder, with the extremities of the wafer array extending substantially beyond the inner and outer edges of the narrower planar surface of said polisher, and rotating said holder and said polisher in the same sense about the axis of the wafer array and the axis of the annulus, respectively, said axes being parallel and displaced by a distance greater than the distance from the center of the wafer array to the outer edge of any wafer thereof, while maintaining said faces of said wafers to be polished under pressure against said planar surface of said polisher, to continuously polish the face of each wafer except that portion of the wafer face which lies beyond the planar surface of the polisher during each excursion of the respective wafer to the nearest and furthest positions relative to said axis of the annulus along the line intersecting both of said axes.
Claim 5
Dependent Claim
246 words
A process for polishing the main faces of semiconductor wafers to a smooth flat finish, which comprises mounting a plurality of said wafers in an array on a common circle of centers on the planar surface of a flat holder so that the faces of said wafers to be polished lie in a substantially common plane to the extent possible with deviations in thickness and flatness of the mounted wafers, disposing the faces of said wafers to be polished in confronting relationship to the planar surface of an annular polisher disposed parallel to said planar surface of said holder, with the extremities of the wafer array extending substantially beyond the inner and outer edges of the narrower planar surface of said polisher, and rotating said holder and said polisher in the same sense about the axis of the wafer array and the axis of the annulus, respectively, said axes being parallel and displaced by a distance greater than the distance from the center of the wafer array to the outer edge of any wafer thereof, while maintaining said faces of said wafers to be polished under pressure against said planar surface of said polisher, to continuously polish the face of each wafer except that portion of the wafer face which lies beyond the planar surface of the polisher during each excursion of the respective wafer to the nearest and furthest positions relative to said axis of the annulus along the line intersecting both of said axes.
References Cited (Backward Citations)
US2618911A
Cited
US2839877A
Cited
US2883803A
Cited
US2979868A
Cited
US2998680A
Cited
US3110988A
Cited
US3453783A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-10-24 | 1976-04-24 | 1976-10-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-10-24 | 1980-04-24 | 1980-10-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-10-24 | 1984-04-24 | 1984-10-24 | $7700.00 | Window Closed / Lapsed |