Digital data communication system providing a recirculating poll of a plurality of remote terminal units

Claim 3

The method of claim 1 further including the steps of: counting the special characters in the polling string, addressing the start of the program string in memory at an address determined by the address of the special character condition at the end of the polling message minus a predetermined multiple of the number of special characters counted in the program string.

Claim 4

The method of claim 2 wherein the polling string stored in memory has a number of addressable characters that is an integral multiple of said address interval of the special characters.

Claim 5

In a data communication system in which digital characters are transferred between an addressable memory and a plurality of addressable remote terminals through an input-output control unit over a single transmission line, apparatus for continuously polling the remote terminals in any predetermined sequence from a string of polling messages stored in consecutive address locations in the memory starting at a predetermined address, comprising register means storing said predetermined address, means utilizing the address in said register for transferring the contents of said predetermined address in memory to said transmission line and incrementing the register to the next address in the polling message, means utilizing the incremented address for transferring the contents of memory from successive addresses to the transmission line, and means sensing the last character in the polling message string when transferred out of memory for resetting the register to the initial address, whereby the polling message string is repeatedly read out of memory to the transmission line for transmission to the remote station.

Claim 6

In a data communication system in which digital characters are transferred between an addressable memory and a plurality of addressable remote terminals through an input-output control unit over a single transmission line, apparatus for continuously polling the remote terminals in any predetermined sequence from a string of polling messages stored in consecutive address locations in the memory starting at a predetermined address, comprising register means storing said predetermined address, means utilizing the address in said register for transferring the contents of said predetermined address in memory to said transmission line and incrementing the register to the next address in the polling message, means utilizing the incremented address for transferring the contents of memory from successive addresses to the transmission line, and means sensing the last character in the polling message string when transferred out of memory for resetting the register to the initial address, whereby the polling message string is repeatedly read out of memory to the transmission line for transmission to the remote station.

Claim 7

Apparatus as defined in claim 4 wherein said resetting means includes means sensing a special character in said polling message, means responsive to the sensing means for counting the number of such special characters, and means responsive to the counting means when the last character in the polling message is sensed for decrementing the register by an integral multiple of count condition of the counting means.

Claim 8

In a data communicatiOn system in which digital characters are transferred between an addressable memory and a plurality of addressable remote terminals through an input-output control unit over a single transmission line, apparatus for continuously polling the remote terminals in any predetermined sequence from a string of polling messages stored in the memory starting at a predetermined address, comprising register means storing said predetermined address, means utilizing the address in said register for transmitting the polling messages from sequential address locations in memory over said transmission line, means for incrementing the address in the address register as each addressable portion of the polling string is transferred out of memory to the transmission line, the string of polling messages in memory including control characters at predetermined equal address increments, means responsive to said control characters as they are transferred out of memory for counting the number of said address increments in the polling message, means sensing the end of the polling string when the last message is read out of memory, and means responsive to said counting means for decrementing the address in said register a number of times determined by the state of said counting means.

Claim 9

In a data communicatiOn system in which digital characters are transferred between an addressable memory and a plurality of addressable remote terminals through an input-output control unit over a single transmission line, apparatus for continuously polling the remote terminals in any predetermined sequence from a string of polling messages stored in the memory starting at a predetermined address, comprising register means storing said predetermined address, means utilizing the address in said register for transmitting the polling messages from sequential address locations in memory over said transmission line, means for incrementing the address in the address register as each addressable portion of the polling string is transferred out of memory to the transmission line, the string of polling messages in memory including control characters at predetermined equal address increments, means responsive to said control characters as they are transferred out of memory for counting the number of said address increments in the polling message, means sensing the end of the polling string when the last message is read out of memory, and means responsive to said counting means for decrementing the address in said register a number of times determined by the state of said counting means.

Claim 10

Apparatus for polling a plurality of remote terminal units comprising a main memory, a plurality of data communication lines for transmitting information to the remote terminal units, an address memory having a word location reserved therein for each data communication line, multi-line control means for selectively coupling the data communication lines to the main memory over a single channel, the word location for at least one data channel in the address memory storing the base address of a string of polling message stored in sequential address locations in the main memory, an address register, the multi-line control means including means responsive to the selection of the particular one of the data communication lines for addressing the corresponding location in the address memory to write the address into the address register, means responsive to the address in the address register for addressing the main memory to transfer a word of the polling message to the communication line, means incrementing the address in the register and restoring it to the same location in the address memory, counting means associated with each communication line, means responsive to a first predetermined control word in the polling message when read out of main memory for incrementing the associated counting means, and means responsive to a second predetermined control word in the polling message when read out of main memory for decrementing the address in said location in the address memory by an amount proportional to the count condition of said counting means.

Claim 11

Apparatus for polling a plurality of remote terminal units comprising a main memory, a plurality of data communication lines for transmitting information to the remote terminal units, an address memory having a word location reserved therein for each data communication line, multi-line control means for selectively coupling the data communication lines to the main memory over a single channel, the word location for at least one data channel in the address memory storing the base address of a string of polling message stored in sequential address locations in the main memory, an address register, the multi-line control means including means responsive to the selection of the particular one of the data communication lines for addressing the corresponding location in the address memory to write the address into the address register, means responsive to the address in the address register for addressing the main memory to transfer a word of the polling message to the communication line, means incrementing the address in the register and restoring it to the same location in the address memory, counting means associated with each communication line, means responsive to a first predetermined control word in the polling message when read out of main memory for incrementing the associated counting means, and means responsive to a second predetermined control word in the polling message when read out of main memory for decrementing the address in said location in the address memory by an amount proportional to the count condition of said counting means.

Claim 12

Apparatus as defined in claim 7 wherein the multi-line control means includes a control word memory for storing a control word for each data communication line, a control register for receiving from said control word memory the control word associated with the particular data communication line being serviced by the multi-line control means, the control word including bits coded to indicate that a polling message is being transferred by the particular data communication line, the register including said counting means whereby a field of the control word in the control register stores said count condition, said means incrementing the counting means being responsive to the coded bits in the control word indicating that a polling message is being transferred by the associated data communication line for incrementing the counting means only when a polling message is being transmitted.

Claim 13

Apparatus as defined in claim 8 wherein the means for decrementing the associated address stored in the address memory includes means for subtracting the count condition of the count field of the control word in the control register from a portion of the address in the address register of the maiN memory.

Claim 14

Apparatus of claim 9 wherein the subtracting means includes means for simultaneously counting the count field down to zero and simultaneously counting a higher order digit of the address in the address register by the same number of counts.