Message assembly and response system

Claim 3

A system according to claim 1 wherein said control means connected to said rotating memory means, said associative memory means, and said plurality of buffer storage means for entering said key addresses from said rotating memory means into said argument register for comparison with said key addresses in said storage locations of said associative memory also enters the remainder of said segments of data for each key address into each of said plurality of buffer means, and wherein said means connected to said plurality of buffer storage means and said rotating memory means and responsive to a match between said key address in said argument register and the key address in a storage location of said associative memory prevents any further data from entering the buffer storage means associated with the matched storage location.

Claim 4

A system according to claim 1 further including a second plurality of buffer storage means, each connected to the output of said first mentioned plurality of buffer storage means, means for transferring the contents of said first plurality of buffer storage means to said second plurality of buffer storage means, a plurality of output channels each connected to a separate one of said second plurality of buffer storage means, and means for transferring the contents of said second plurality of storage means to said output channels in sequence.

Claim 5

A system according to claim 1 wherein said plurality of equal length segments of data stored on said rotating memory relate to message words and wherein a single message word may be represented by a number of data segments, each of said data segments representing a single message word having the same key data and a separate segment number indicating the sequence in which said segments represent said single message word; and wherein said key address data signals in said associative memory storage locations include said representative segment numbers.

Claim 6

A system according to claim 4 wherein said control means includes means for incrementing the segment number of a key address data signal in said associative memory by an increment of one upon the occurrence of a match between said key address data signal and said key address in said argument register.

Claim 7

A voice answer back system for generating a plurality of digitally coded messages adapted to be converted to audio signals on a plurality of output lines comprising: an associative memory means including an argument register, a plurality of storage locations for storing input key adDress data signals each having a key designation and a segment number designation, and a match indicator means for each of said plurality of storing locations, a multi-track rotating memory means connected to said associative memory means having a plurality of equal length segments of data representative of sequential portions of message words stored thereon, each of said equal length segments being preceded by stored key address signals having a key designation and a segment number representative of the data stored in said associated segment, said segment number being indicative of which sequential portion of the message word is stored in said segment, said rotating memory further including a read-out head for each of said storage tracks, a plurality of buffer storage means connected to the read-out heads of said rotating memory means, each of said buffer storage means being associated with a separate one of said storage locations of said associative memory means, control means connected to said read-out heads of said rotating memory means, said associative memory means and said plurality of buffer storage means for entering said key address signals from said rotating memory means into said argument register for comparison with said key address signals in said storage locations of said associative memory, said match indicator means being set to a given state when a match occurs between the contents of the argument register and the contents of the related storage locations, and means connected to said plurality of buffer storage means, said read-out heads of said rotating memory means and responsive to a match and said match indicator means for storing the segment of data corresponding to a matched key address in said buffer storage means.

Claim 8

A voice answer back system for generating a plurality of digitally coded messages adapted to be converted to audio signals on a plurality of output lines comprising: an associative memory means including an argument register, a plurality of storage locations for storing input key adDress data signals each having a key designation and a segment number designation, and a match indicator means for each of said plurality of storing locations, a multi-track rotating memory means connected to said associative memory means having a plurality of equal length segments of data representative of sequential portions of message words stored thereon, each of said equal length segments being preceded by stored key address signals having a key designation and a segment number representative of the data stored in said associated segment, said segment number being indicative of which sequential portion of the message word is stored in said segment, said rotating memory further including a read-out head for each of said storage tracks, a plurality of buffer storage means connected to the read-out heads of said rotating memory means, each of said buffer storage means being associated with a separate one of said storage locations of said associative memory means, control means connected to said read-out heads of said rotating memory means, said associative memory means and said plurality of buffer storage means for entering said key address signals from said rotating memory means into said argument register for comparison with said key address signals in said storage locations of said associative memory, said match indicator means being set to a given state when a match occurs between the contents of the argument register and the contents of the related storage locations, and means connected to said plurality of buffer storage means, said read-out heads of said rotating memory means and responsive to a match and said match indicator means for storing the segment of data corresponding to a matched key address in said buffer storage means.

Claim 9

A system according to claim 6 wherein said control means connected to said read-out heads of said rotating memory means, said associative memory means, and said plurality of buffer storage means for entering said key addresses from said rotating memory means into said argument register for comparison with said key addresses in said storage locations of said associative memory also enters the remainder of said segments of data for each key address into each of said plurality of buffer means, and wherein said means connected to said plurality of buffer storage means and said read-out heads of said rotating memory means and responsive to a match between said key address in said argument register and the key address in a storage location of said associative memory prevents any further data from entering the buffer storage means associated with the matched storage location.

Claim 10

A system according to claim 6 further including a second plurality of buffer storage means, each connected to the output of said first mentioned plurality of buffer storage means, means for transferring the contents of said first plurality of buffer storage means to said second plurality of buffer storage means, a plurality of output channels, each connected to a separate one of said second plurality of buffer storage means, and means for transferring the contents of said second plurality of storage means to said output channels in sequence.

Claim 11

A system according to claim 6 wherein said control means includes means for incrementing the segment number of a key address data signal in said associative memory by an increment of one upon the occurrence of a match between said key address data signal and said key address in said argument register.