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US3657698A Expired / Lapsed US ⏱️ 0.0 years remaining

Signalling supervision unit

Assignee: International Standard Electric Corp
•
Filing: 1970-02-19
•
Granted: 1972-04-18
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Expires: 1990-02-19
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Abstract

Abstract A signalling supervision unit for pulse code modulation systems provides for detecting and interpreting signalling signals by comparing an incoming stream of signals with a stored state corresponding to the signals expected and storing any differences detected during the comparison.

Inventors

  • 👤 Bernard Pierre Jean Durteste
  • 👤 Jean-Claude Gadre
  • 👤 Jean Francois Pierre Ju Loisel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 16:17
CPC Classifications
H; H04; H04Q; H04Q11/00; H04Q11/04; H04J; H04J3/00; H04J3/02; H04J3/12

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 153 words
A time division multiplex data switching central exchange employing pulse code modulation for receiving data on junctions in the form of messages of p digits duration in series, selected ones of the p digits of certain messages of each one of the channels containing information concerning the signalling states of the channel, said data switching central exchange comprising a switching network, P-junction group circuits connected to the inlets of the switching network and provided for carrying out a series-parallel conversion of the digits of the message of the channels of P-junctions, junctors connected to the output of the switching network, each junctor including a speech memory as well as a space path memory and a time path memory provided for setting up a connection between two channels, and a marker circuit connected to the junctors for up-dating the space and time path memories of the junctors in relation to the communications in course.
Claim 2
Dependent Claim 153 words
A time division multiplex data switching central exchange employing pulse code modulation for receiving data on junctions in the form of messages of p digits duration in series, selected ones of the p digits of certain messages of each one of the channels containing information concerning the signalling states of the channel, said data switching central exchange comprising a switching network, P-junction group circuits connected to the inlets of the switching network and provided for carrying out a series-parallel conversion of the digits of the message of the channels of P-junctions, junctors connected to the output of the switching network, each junctor including a speech memory as well as a space path memory and a time path memory provided for setting up a connection between two channels, and a marker circuit connected to the junctors for up-dating the space and time path memories of the junctors in relation to the communications in course.
Claim 3
Dependent Claim 71 words
A detection and interpretation device of the signalling digits received according to claim 1 including a logic circuit for interpretation of the signalling digits, incorporating means for scanning a number of consecutive signalling digits on a same channel and determining whenever two consecutive digits corresponding to the expected signalling state have not been detected, the said expected state as well as the preceding digit received being written in the signalling memory.
Claim 4
Dependent Claim 45 words
An exchange as claimed in claim 1, in which a clock circuit is provided for delivering cyclic signals required for the operation of the circuits, the clock circuit including a detection and interpretation device for the signalling digits associated with each p junction group circuit.
Claim 5
Dependent Claim 395 words
A data switching central exchange according to claim 4 in which detection and interpretation devices for the signalling digits associated with each of a plurality of P-junction group circuits comprise: a first reading device for reading in a cyclic way the g/2 lines of a data memory of a group in which are written g messages received in the course of a cycle TR, the said reading means transmItting for recording in the two registers during a time 2TR/g two messages coming from two different junctions of the group; a signalling memory with g/2 lines each line of which contains, in the form of a binary word, the information required for the processing of the channels of two different junctions of a P-junction group; a second reading device reading in a cyclic way the g/2 lines of the signalling memory; a third reading device reading the signalling memory between the instants reserved to the cyclic reading, said device being controlled by the data processing machine which controls the central exchange; an interpretation logic circuit of the signalling digits received which receives at each cyclic reading time, on the one hand, the signalling digit of each one of the two messages stored in the two registers associated to the group data memory, and on the other hand, a part of the binary word stored in a line of the signalling memory, the said part of the binary word corresponding to the two channels the messages of which are stored in the registers associated with the group data memory; a first cyclic writing device of the signalling memory modifying, if required, certain digits of the binary words in relation with the output signals of the interpretation logic circuit of the signalling signals received and of the signals supplied by the P-junction group circuit; a second writing device including means for modifying any digit of the binary words contained in the signalling memory between the instants reserved to the cyclic writing, the said device being controlled by the data processing machine which controls the data switching central exchange; and a logic circuit receiving, at each cyclic reading time, the second part of the binary word contained in the line of the signalling memory, the said part of the binary word corresponding to the signalling signals to be sent on two channels of the circuit of the P-junction group.

References Cited (Backward Citations)

US3335224A Cited
US3343125A Cited
US3461426A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-04-18 1975-10-18 1976-04-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-04-18 1979-10-18 1980-04-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-04-18 1983-10-18 1984-04-18 $7700.00 Window Closed / Lapsed

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