US3638186A
Expired / Lapsed
US
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Arrangement for error determination
Assignee: Dr Johannes Heidenhain GmbH
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Filing: 1969-09-26
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Granted: 1972-01-25
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Expires: 1989-09-26
Abstract
Abstract A method and device for error prevention in incremental measuring systems which comprise a measuring scale and a sensing device producing, during relative movement, sensing signals, and an electronic circuit, and a counter circuit of a measuring system. A comparison is performed of the residue of the counter result after subtraction of a whole multiple of a full number n with signals and signal combinations, respectively, derived from the sensing signals which bypass the counter circuit.
Inventors
- 👤 Ernst Schwefel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-22 16:45
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/22; H03M1/24; H03M1/28; H03M1/30
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
210 words
An arrangement for error prevention in incremental measuring systems comprising a measuring scale and a sensing device relatively movable with respect to each other and producing error-containing sensing signals thereby, comprising an electronic counter means receiving said error-containing sensing signals and for providing a counting result, an electronic circuit comprising three exclusive-OR-gates, means for feeding one of said sensing signals to an input of one of said exclusive-OR-gates bypassing said electronic counter means, a flip-flop means for determining an examination modus and having an output being connected with the other input of said one exclusive-OR-gate, the output of said one exclusive-OR-gate being connected with one of the inputs of a second of said exclusive-OR-gates, means for feeding the other of said sensing signals phase displaced relative to said one of said sensing signals to the other input of said second exclusive-OR-gate, the output of the second exclusive-OR-gate being connected with one of the inputs of a third of said exclusive-OR-gates, and the other input of said third exclusive-OR-gate being connected with an output of one digit of a lowermost stage of said counter means, and an error indication means connected to the output of said third exclusive-OR-gAte for controlling the error indication unit by impulses emitted from said third exclusive-OR-gate.
Claim 2
Dependent Claim
210 words
An arrangement for error prevention in incremental measuring systems comprising a measuring scale and a sensing device relatively movable with respect to each other and producing error-containing sensing signals thereby, comprising an electronic counter means receiving said error-containing sensing signals and for providing a counting result, an electronic circuit comprising three exclusive-OR-gates, means for feeding one of said sensing signals to an input of one of said exclusive-OR-gates bypassing said electronic counter means, a flip-flop means for determining an examination modus and having an output being connected with the other input of said one exclusive-OR-gate, the output of said one exclusive-OR-gate being connected with one of the inputs of a second of said exclusive-OR-gates, means for feeding the other of said sensing signals phase displaced relative to said one of said sensing signals to the other input of said second exclusive-OR-gate, the output of the second exclusive-OR-gate being connected with one of the inputs of a third of said exclusive-OR-gates, and the other input of said third exclusive-OR-gate being connected with an output of one digit of a lowermost stage of said counter means, and an error indication means connected to the output of said third exclusive-OR-gAte for controlling the error indication unit by impulses emitted from said third exclusive-OR-gate.
Claim 3
Dependent Claim
137 words
The arrangement, as set forth in claim 1, further comprising an electronic means connected to the output of said second exclusive-OR-gate, said electronic means for emitting impulses in the immediate vicinity of switching steps of counting impulses of said incremental measuring system by means of its output, a NAND gate having an input connected to the output of said electronic means, an electronic retarding member is connected to the output of said third exclusive-OR-gate, the other of the inputs of said NAND gate is connected with the output of said electronic retarding member, the output of said NAND gate is connected to said error indication unit, and means for making inoperative the indication of errors by said error indication means for short time periods at moments when said counting impulses of said measuring system rise and fall.
Claim 4
Dependent Claim
101 words
The arrangement, as set forth in claim 1, further comprising a first and second NAND gate, an electric switch is connected by its output directly with one of the inputs of said first NAND gate, the input of said second NAND gate is connected to the output of said electric switch, said error indication means includes a set-reset flip-flop connected to the output of said second NAND gate, the other of said inputs of said first NAND gate is connected with the output of said third exclusive-OR-gate, and the output of said first NAND gate is connected to said flip-flop means.
Claim 5
Independent Claim
77 words
A method for error prevention in incremental measuring systems having a measuring scale and a sensing device relatively movable with respect to each other and producing error-containing sensing signals thereby, comprising the steps of sending said error-containing sensing signals to a counter to provide a counting result, forming a residue of the counting result after a subtraction thereof of a whole multiple of a full number, and comparing said residue with said sensing signals bypassing said counter.
Claim 6
Independent Claim
77 words
A method for error prevention in incremental measuring systems having a measuring scale and a sensing device relatively movable with respect to each other and producing error-containing sensing signals thereby, comprising the steps of sending said error-containing sensing signals to a counter to provide a counting result, forming a residue of the counting result after a subtraction thereof of a whole multiple of a full number, and comparing said residue with said sensing signals bypassing said counter.
Claim 7
Dependent Claim
18 words
The method, as set forth in claim 4, wherein said whole multiple of a full number is 2.
Claim 8
Dependent Claim
18 words
The method, as set forth in claim 4, wherein said whole multiple of a full number of 4.
Claim 9
Dependent Claim
18 words
The method, as set forth in claim 4, wherein said whole multiple of a full number is 10.
Claim 10
Dependent Claim
46 words
The method as set forth in claim 4, wherein for the formation of said residue after subtraction of a whole multiple of a full number n, the logical state prevailing in one of the digits of the lowermost stage of an n-digit electronic counter is applied.
Claim 11
Dependent Claim
38 words
The method as set forth in claim 4, further comprising the step of causing the cancellation of an error indication and rendering effective simultaneously an examination modus for a momentary coordination of the counter result and sensing signals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-01-24 | 1975-07-26 | 1976-01-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-01-24 | 1979-07-26 | 1980-01-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-01-24 | 1983-07-26 | 1984-01-25 | $7700.00 | Window Closed / Lapsed |