US3629856A
Expired / Lapsed
US
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Multichannel signal-processing system
Assignee: Tokyo Keiki Inc
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Filing: 1970-03-19
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Granted: 1971-12-21
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Expires: 1990-03-19
Abstract
Abstract A multichannel signal-processing system having a simplified arrangement wherein multiple signal channel-selecting circuits for multiple channel input signals and a supplementary channelselecting circuit or circuits corresponding to single or plural data available from supplementary circuit or circuits each having a data source is loop connected in series with each other in a predetermined order in the form of a ring counter, said signal channel-selecting circuits and said supplementary channelselecting circuit or circuits are driven in a predetermined order so that the multiple channel input signals and the single or plural data may be successively selected, and the multiple channel input signals of the multiple channel input signals and single or plural data selected in the predetermined order as described above are processed in a signal-processing circuit controlled by a main control circuit, whereas the single or plural data are supplied to the main control circuit to constitute control signal to control the signal-processing circuit.
Inventors
- 👤 Takeshi Arai
- 👤 Hideo Aizawa
- 👤 Masashi Miura
- 👤 Yoshio Numaho
- 👤 Masahisa Takeya
- 👤 Tasuku Yoshida
- 👤 Noboru Ishibashi
- 👤 Kaichiro Yamashita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 16:21
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/22
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
210 words
A multichannel signal-processing system comprising: a plurality of channel signal sources, a plurality of signal input circuits corresponding to said plurality of channel signal sources respectively, a signal-processing circuit, and a control circuit for controlling said signal-processing circuit, each of said plurality of signal input circuits including a signalswitching circuit, a memory circuit with a data stored therein, a signal channel-selecting circuit, and a data-switching circuit, said signal-switching circuit being controlled and driven by an output of said signal channel-selecting circuit to deliver a signal from the corresponding one of said channel signal sources to said signal-processing circuit through a common signal line, said memory circuit being driven by a timing pulse fed thereto from said control circuit through a common timing pulse line, said data-switching circuit being controlled and driven by said signal channel-selecting circuit to deliver the data from said memory circuit to said control circuit through a common memory data line, and said signal channel-switching circuits of said plurality of signal input circuits being loop connected in the form of a ring counter through said control circuit and successively driven to deliver successively the signals of said plurality of channel signals sources to said signal-processing circuit and the datum of said memory circuits to said control circuit.
Claim 2
Dependent Claim
210 words
A multichannel signal-processing system comprising: a plurality of channel signal sources, a plurality of signal input circuits corresponding to said plurality of channel signal sources respectively, a signal-processing circuit, and a control circuit for controlling said signal-processing circuit, each of said plurality of signal input circuits including a signalswitching circuit, a memory circuit with a data stored therein, a signal channel-selecting circuit, and a data-switching circuit, said signal-switching circuit being controlled and driven by an output of said signal channel-selecting circuit to deliver a signal from the corresponding one of said channel signal sources to said signal-processing circuit through a common signal line, said memory circuit being driven by a timing pulse fed thereto from said control circuit through a common timing pulse line, said data-switching circuit being controlled and driven by said signal channel-selecting circuit to deliver the data from said memory circuit to said control circuit through a common memory data line, and said signal channel-switching circuits of said plurality of signal input circuits being loop connected in the form of a ring counter through said control circuit and successively driven to deliver successively the signals of said plurality of channel signals sources to said signal-processing circuit and the datum of said memory circuits to said control circuit.
Claim 3
Dependent Claim
97 words
A multichannel signal-processing system according to claim 1 further comprising at least one first supplementary circuit, said first supplementary circuit including a first data source and a supplementary channel-selecting circuit, said first data source being controlled and driven by an output of said supplementary channel-selecting circuit and a timing pulse derived from said control circuit through said common timing pulse line to deliver a first data to said control circuit through a first common data line, and said supplementary channel-selecting circuit being inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 4
Dependent Claim
150 words
A multichannel signal-processing system according to claim 1 further comprising at least one second supplementary circuit, said second supplementary circuit including a second data source, a third data source, a supplementary data-switching circuit and a supplementary channel-selecting circuit, said second data source being controlled and driven by an output of said supplementary channel-selecting circuit and a timing pulse derived from said control circuit through said common timing pulse line to deliver a second data to said control circuit through a first common data line, said third data source being driven by said timing pulse, said supplementary data-switching circuit being controlled and driven by said output of said supplementary channel-selecting circuit to deliver an output of said third data source to said control circuit through said common memory data line, and said supplementary channel-selecting cIrcuit being inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 5
Dependent Claim
122 words
A multichannel signal-processing system according to claim 1 further comprising at least one third supplementary circuit, said third supplementary circuit including a fourth data source, a fifth data source, a supplementary first channel-selecting circuit and a supplementary second channel-selecting circuit, said fourth and fifth data source being controlled and driven by outputs of said supplementary first and second channel-selecting circuits and a timing pulse derived from said control circuit through said common timing pulse line to deliver fourth and fifth datum to said control circuit through a first common data line and said supplementary first and second channel-selecting circuits being connected in series to each other and inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 6
Dependent Claim
289 words
A multichannel signal-processing system comprising a plurality of channel signal sources, a plurality of signal input circuits corresponding to said channel signal sources respectively, a signal-processing circuit, and a control circuit for control of said signal-processsing circuit, each of said plurality of signal input circuits including a signal-switching circuit, a signal channel-selecting circuit, an abnormal detector, an abnormal data-producing means, a control means and an abnormal data-switching circuit, said signal-switching circuit being controlled and driven by an output of said signal channel-selecting circuit to deliver a signal from the corresponding one of said channel signal sources to said signal-processing circuit through a common signal line, said abnormal detector detecting whether the signal from the corresponding one of said channel signal sources is abnormal or not, said abnormal data-producing means producing an abnormal data in accordance with the output of said abnormal detector and being reset by a control signal from said control means and controlled by a timing pulse derived from said control circuit through a common timing pulse line, said control means being controlled and driven by said output of said signal channel-selecting circuit and an abnormal confirmation signal derived from said control circuit through a common confirmation signal line, said abnormal data-switching circuit being controlled and driven by the output of said signal channel-selecting circuit to deliver an abnormal data to said control circuit through a common abnormal data line and said signal channel-selecting circuits of said plurality of signal input circuits being loop connected in the form of a ring counter through said control circuit and successively driven to deliver successively the signals of said plurality of channel sources to said signal-processing circuit and the abnormal datum of said abnormal data-producing means to said control circuit.
Claim 7
Dependent Claim
289 words
A multichannel signal-processing system comprising a plurality of channel signal sources, a plurality of signal input circuits corresponding to said channel signal sources respectively, a signal-processing circuit, and a control circuit for control of said signal-processsing circuit, each of said plurality of signal input circuits including a signal-switching circuit, a signal channel-selecting circuit, an abnormal detector, an abnormal data-producing means, a control means and an abnormal data-switching circuit, said signal-switching circuit being controlled and driven by an output of said signal channel-selecting circuit to deliver a signal from the corresponding one of said channel signal sources to said signal-processing circuit through a common signal line, said abnormal detector detecting whether the signal from the corresponding one of said channel signal sources is abnormal or not, said abnormal data-producing means producing an abnormal data in accordance with the output of said abnormal detector and being reset by a control signal from said control means and controlled by a timing pulse derived from said control circuit through a common timing pulse line, said control means being controlled and driven by said output of said signal channel-selecting circuit and an abnormal confirmation signal derived from said control circuit through a common confirmation signal line, said abnormal data-switching circuit being controlled and driven by the output of said signal channel-selecting circuit to deliver an abnormal data to said control circuit through a common abnormal data line and said signal channel-selecting circuits of said plurality of signal input circuits being loop connected in the form of a ring counter through said control circuit and successively driven to deliver successively the signals of said plurality of channel sources to said signal-processing circuit and the abnormal datum of said abnormal data-producing means to said control circuit.
Claim 8
Dependent Claim
88 words
A multichannel signal-processing system according to claim 5 further comprising at least one first supplementary circuit, said first supplementary circuit including a first data source being controlled and driven by an output of said supplementary channel-selecting circuit and a timing pulse derived from said control circuit through said common timing pulse line to deliver a first data to said control circuit through a first common data line, and said supplementary channel-selecting circuit being inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 9
Dependent Claim
150 words
A multichannel signal-processing system according to claim 5 further comprising at least one second supplementary circuit, said second supplementary circuit including a second data source, a third data source, a supplementary data-switching circuit and a supplementary channel-selecting circuit, said second data source being controlled and driven by an output of said supplementary channel-selecting circuit and a timing pulse derived from said control circuit through said common timing pulse line to deliver a second data to said control circuit through a first common data line, said third data source being driven by said timing pulse, said supplementary data-switching circuit being controlled and driven by said output of said supplementary channel-selecting circuit to deliver an output of said third data source to said control circuit though said common abnormal data line, and said supplementary channel-selecting circuit being inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 10
Dependent Claim
122 words
A multichannel signal-processing system according to claim 5 further comprising at least one third supplementary circuit, said third supplementary circuit including a fourth data source, a fifth data source, a supplementary first channel-selecting circuit and a supplementary second channel-selecting circuit, said fourth and fifth data source being controlled and driven by outputs of said supplementary first and second channel-selecting circuits and a timing pulse derived from said control circuit through said common timing pulse line to deliver fourth and fifth datum to said control circuit through a first common data line and said supplementary first and second channel-selecting circuits being connected in series to each other and inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 11
Dependent Claim
224 words
A multichannel signal-processing system comprising a plurality of channel signal sources, a plurality of signal input circuits corresponding to said plurality of channel signal sources respectively at least one first supplementary circuit, a signal-processing circuit, and a control circuit for control of said signal-processing circuit, each of said plurality of signal input circuits including a signal-switching circuit and a signal channel-selecting circuit, said signal-switching circuit being controlled and driven by an output of said signal channel-selecting circuit to deliver a signal from the corresponding one of said channel signal sources to said signal-processing circuit through a common signal line, said signal channel-selecting circuits of said plurality of signal input circuits being loop connected in the form of a ring counter through said control circuit and successively driven to deliver successively the signal of said plurality of channel signal sources to said signal-processing circuit, said first supplementary circuit including a first data source and a supplementary channel-selecting circuit, said first data source being controlled and driven by an output of said supplementary channel-selecting circuit and a timing pulse derived from said control circuit through a common timing pulse line to deliver a first data to said control circuit through a first common data line, and said supplementary channel-selecting circuit being inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 12
Dependent Claim
224 words
A multichannel signal-processing system comprising a plurality of channel signal sources, a plurality of signal input circuits corresponding to said plurality of channel signal sources respectively at least one first supplementary circuit, a signal-processing circuit, and a control circuit for control of said signal-processing circuit, each of said plurality of signal input circuits including a signal-switching circuit and a signal channel-selecting circuit, said signal-switching circuit being controlled and driven by an output of said signal channel-selecting circuit to deliver a signal from the corresponding one of said channel signal sources to said signal-processing circuit through a common signal line, said signal channel-selecting circuits of said plurality of signal input circuits being loop connected in the form of a ring counter through said control circuit and successively driven to deliver successively the signal of said plurality of channel signal sources to said signal-processing circuit, said first supplementary circuit including a first data source and a supplementary channel-selecting circuit, said first data source being controlled and driven by an output of said supplementary channel-selecting circuit and a timing pulse derived from said control circuit through a common timing pulse line to deliver a first data to said control circuit through a first common data line, and said supplementary channel-selecting circuit being inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 13
Dependent Claim
268 words
A multichannel signal-processing system comprising a plurality of channel signal courses, a plurality of signal input circuits corresponding to said plurality of channel signal sources respectively, at least one second supplementary circuit, a signal-processing circuit, and a control circuit for control of said signal-processing circuit, each of said plurality of signal input circuits including a signal-switching circuit and a signal channel-switching circuit, said signal-switching circuit being controlled and driven by an output of said signal channel-selecting circuit to deliver a signal from the corresponding one of said channel signal sources to said signal-processing circuit through a common signal line, said signal channel-selecting circuits of said plurality of signal input circuits being loop connected in the form of a ring counter through said control circuit and successively driven to deliver successively the signal of said plurality of channel signal sources to said signal-processing circuit, said second supplementary cIrcuit including a second data source, a third data source, a supplementary data-switching circuit and a supplementary channel-selecting circuit, said second data source being controlled and driven by an output of said supplementary channel-selecting circuit and a timing pulse derived from said control circuit through a common timing pulse line to deliver a second data to said control circuit through a first common data line, said third data source being driven by said timing pulse, said supplementary data-switching circuit being controlled and driven by said output of said third data source to said control circuit through a second common data line, and said supplementary channel-selecting circuit being inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 14
Dependent Claim
268 words
A multichannel signal-processing system comprising a plurality of channel signal courses, a plurality of signal input circuits corresponding to said plurality of channel signal sources respectively, at least one second supplementary circuit, a signal-processing circuit, and a control circuit for control of said signal-processing circuit, each of said plurality of signal input circuits including a signal-switching circuit and a signal channel-switching circuit, said signal-switching circuit being controlled and driven by an output of said signal channel-selecting circuit to deliver a signal from the corresponding one of said channel signal sources to said signal-processing circuit through a common signal line, said signal channel-selecting circuits of said plurality of signal input circuits being loop connected in the form of a ring counter through said control circuit and successively driven to deliver successively the signal of said plurality of channel signal sources to said signal-processing circuit, said second supplementary cIrcuit including a second data source, a third data source, a supplementary data-switching circuit and a supplementary channel-selecting circuit, said second data source being controlled and driven by an output of said supplementary channel-selecting circuit and a timing pulse derived from said control circuit through a common timing pulse line to deliver a second data to said control circuit through a first common data line, said third data source being driven by said timing pulse, said supplementary data-switching circuit being controlled and driven by said output of said third data source to said control circuit through a second common data line, and said supplementary channel-selecting circuit being inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 15
Dependent Claim
249 words
A multichannel signal-processing system comprising a plurality of channel signal sources, a plurality of signal input circuits corresponding to said plurality of channel signal sources respectively, at least one third supplementary circuit, a signal-processing circuit, and a control circuit for control of said signal-processing circuit, each of said plurality of signal input circuits including a signal-switching circuit and a signal channel-selecting circuit, said signal-switching circuit being controlled and driven by an output of said signal channel-selecting circuit to deliver a signal from the corresponding one of said channel signal sources to said signal-processing circuit through a common signal line, said signal channel-selecting circuits of said plurality of signal input circuits being loop connected in the form of a ring counter through said control circuit and successively driven to deliver successively the signals of said plurality of channel signal sources to said signal-processing circuit, said third supplementary circuit including a fourth data source, a fifth data source, a supplementary first channel-selecting circuit and a supplementary second channel-selecting circuit, said fourth and fifth data source being controlled and driven by outputs of said supplementary first and second channel-selecting circuits and a timing pulse derived from said control circuit through a common timing pulse line to deliver fourth and fifth datum to said control circuit through a first common data line and said supplementary first and second channel-selecting circuits being connected in series to each other and inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
Claim 16
Dependent Claim
249 words
A multichannel signal-processing system comprising a plurality of channel signal sources, a plurality of signal input circuits corresponding to said plurality of channel signal sources respectively, at least one third supplementary circuit, a signal-processing circuit, and a control circuit for control of said signal-processing circuit, each of said plurality of signal input circuits including a signal-switching circuit and a signal channel-selecting circuit, said signal-switching circuit being controlled and driven by an output of said signal channel-selecting circuit to deliver a signal from the corresponding one of said channel signal sources to said signal-processing circuit through a common signal line, said signal channel-selecting circuits of said plurality of signal input circuits being loop connected in the form of a ring counter through said control circuit and successively driven to deliver successively the signals of said plurality of channel signal sources to said signal-processing circuit, said third supplementary circuit including a fourth data source, a fifth data source, a supplementary first channel-selecting circuit and a supplementary second channel-selecting circuit, said fourth and fifth data source being controlled and driven by outputs of said supplementary first and second channel-selecting circuits and a timing pulse derived from said control circuit through a common timing pulse line to deliver fourth and fifth datum to said control circuit through a first common data line and said supplementary first and second channel-selecting circuits being connected in series to each other and inserted in the loop of said plurality of signal channel-selecting circuits at a predetermined position.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-12-20 | 1975-06-21 | 1975-12-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-12-20 | 1979-06-21 | 1979-12-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-12-20 | 1983-06-21 | 1983-12-21 | $7700.00 | Window Closed / Lapsed |