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US3628158A Expired / Lapsed US ⏱️ 0.0 years remaining

Arrangement at parallelly working machines

Assignee: Telefonaktiebolaget LM Ericsson AB
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Filing: 1969-10-27
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Granted: 1971-12-14
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Expires: 1989-10-27
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Abstract

Abstract There is disclosed a fail-safe apparatus for supplying clock pulses to parallelly working machines, preferably computers. An oscillator is associated with each machine and is connectable to the respective machine as well as to the adjacent machines via logical circuits. These circuits are controlled by bistable flipflops which are triggered from frequency sensing devices in such a way that when the frequency of an oscillator for some reason changes the associated flip-flop changes its state and connects the oscillator associated with an adjacent machine to the machine controlled by the defective oscillator.

Inventors

  • 👤 Erik Ivar Sjoquist

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 05:54
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/16; G06F11/1604; G06F1/00; G06F1/04; G06F11/20

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 261 words
An arrangement for generating synchronous clock pulses for at least two data processors operating in parallel, said apparatus comprising two identical circuits, each of said circuits having an output terminal for emitting clock pulses to a different one of the data processors, each of said circuits comprising first and second two-input AND gates having their outputs connected to said output terminal, a clock pulse oscillator, means for connecting the output of said clock pulse oscillator to a first input of said first two-input AND circuit, means for connecting the output of the clock pulse oscillator of the other of said identical circuits to a first input of said second two-input AND circuit, a bistable flip-flop having a one-output and a zerooutput, a one-setting input, and a zero-setting input, means for connecting one of the outputs of said bistable flip-flop to the second input of said first two-input AND gate, means for connecting the other output of said bistable flip-flop to the second input of said second two-input AND gate, and a first detecting means for detecting faults in the clock pulses from the clock pulse oscillator of its associated identical circuit and connected to one of the setting inputs of said bistable flip-flop for transmitting trigger pulses thereto upon detecting of a fault, and a second detecting means for detecting faults in the clock pulses from the clock pulse oscillator of the other of said identical circuits and connected to the other of the setting inputs of said bistable flip-flop for transmitting a trigger pulse thereto upon detecting of a fault.
Claim 2
Dependent Claim 261 words
An arrangement for generating synchronous clock pulses for at least two data processors operating in parallel, said apparatus comprising two identical circuits, each of said circuits having an output terminal for emitting clock pulses to a different one of the data processors, each of said circuits comprising first and second two-input AND gates having their outputs connected to said output terminal, a clock pulse oscillator, means for connecting the output of said clock pulse oscillator to a first input of said first two-input AND circuit, means for connecting the output of the clock pulse oscillator of the other of said identical circuits to a first input of said second two-input AND circuit, a bistable flip-flop having a one-output and a zerooutput, a one-setting input, and a zero-setting input, means for connecting one of the outputs of said bistable flip-flop to the second input of said first two-input AND gate, means for connecting the other output of said bistable flip-flop to the second input of said second two-input AND gate, and a first detecting means for detecting faults in the clock pulses from the clock pulse oscillator of its associated identical circuit and connected to one of the setting inputs of said bistable flip-flop for transmitting trigger pulses thereto upon detecting of a fault, and a second detecting means for detecting faults in the clock pulses from the clock pulse oscillator of the other of said identical circuits and connected to the other of the setting inputs of said bistable flip-flop for transmitting a trigger pulse thereto upon detecting of a fault.
Claim 3
Dependent Claim 22 words
The arrangement of claim 1 wherein said detecting means includes means for sensing for changes in the duration of the clock pulses.
Claim 4
Dependent Claim 31 words
The arrangement of claim 1 wherein said detecting means comprise change-sensing means for sensing for changes in the duration of the clock pulses with respect to time between adjacent clock pulses.
Claim 5
Dependent Claim 62 words
The arrangement of claim 3 wherein said change-sensing means comprise an input terminal for receiving the clock pulses, a first integrating circuit, means for connecting said input terminal to said first integratIng circuit, a second integrating circuit, signal-inverting means connecting said input terminal to said second integrating circuit, and a voltage level comparing circuit connected to said first and second integrating circuits.
Claim 6
Dependent Claim 15 words
The arrangement of claim 4 wherein said voltage level comparing circuit includes a Schmitt trigger.
Claim 7
Dependent Claim 15 words
The arrangement of claim 5 wherein said voltage level comparing circuit includes a differential amplifier.
Claim 8
Dependent Claim 28 words
The arrangement of claim 1 and further comprising means for monitoring said detecting means, said monitoring means comprising means for controllably varying the duration of the clock pulses.

References Cited (Backward Citations)

US3289097A Cited
US3329905A Cited
US3479603A Cited
US3431510A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-12-13 1975-06-14 1975-12-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-12-13 1979-06-14 1979-12-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-12-13 1983-06-14 1983-12-14 $7700.00 Window Closed / Lapsed

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