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US3622897A Expired / Lapsed US ⏱️ 0.0 years remaining

Bias circuit for a differential amplifier

Assignee: NEC Corp
•
Filing: 1969-12-19
•
Granted: 1971-11-23
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Expires: 1989-12-19
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Abstract

Abstract A bias circuit for a differential amplifier comprises a DC balanced bridge having a DC potential applied across one diagonal of the bridge, the biasing potentials for each amplifier of the differential amplifier being taken from the two points located on the other bridge diagonal.

Inventors

  • 👤 Masanobu Tsugita

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 06:47
CPC Classifications
H; H03; H03D; H03D3/00; H03D3/02; H03D3/06; H03D3/08; H03D3/10; H03F; H03F3/00; H03F3/189; H03F3/19; H03F3/195

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 268 words
In a circuit comprising a ratio detector and a differential amplifier for amplifying a detection output from said ratio detector, said ratio detector including a phase transformer having a secondary winding including a midpoint and end connection points thereon, a first branch including a first diode, one end of said first diode being connected to one end of said secondary winding, a second branch including a second diode, and one of said second diode being connected to the other end of said secondary winding, said second diode being oppositely poled in relation to said first diode, third and fourth branches each including a diode therein, said third and fourth branch diodes being connected to each other in series at one end of said respective branches, said diodes being poled in a like direction the remaining end of said third branch being connected to the remaining end of said first branch, and the remaining end of said fourth branch being connected to the remaining end of said second branch; a DC current source connected between a connection point between said first and third branches and a connection point between said second and fourth branches; a differential amplifier having two inputs; first connection means for applying the output from said midpoint of said secondary winding of said phase transformer to one input of said differential amplifier; and second connection means for applying the potential at a connection point between said third and fourth branches to the other input of said differential amplifier; whereby DC bias voltage and a detection output from said ratio detector are applied to said differential amplifier.
Claim 2
Dependent Claim 268 words
In a circuit comprising a ratio detector and a differential amplifier for amplifying a detection output from said ratio detector, said ratio detector including a phase transformer having a secondary winding including a midpoint and end connection points thereon, a first branch including a first diode, one end of said first diode being connected to one end of said secondary winding, a second branch including a second diode, and one of said second diode being connected to the other end of said secondary winding, said second diode being oppositely poled in relation to said first diode, third and fourth branches each including a diode therein, said third and fourth branch diodes being connected to each other in series at one end of said respective branches, said diodes being poled in a like direction the remaining end of said third branch being connected to the remaining end of said first branch, and the remaining end of said fourth branch being connected to the remaining end of said second branch; a DC current source connected between a connection point between said first and third branches and a connection point between said second and fourth branches; a differential amplifier having two inputs; first connection means for applying the output from said midpoint of said secondary winding of said phase transformer to one input of said differential amplifier; and second connection means for applying the potential at a connection point between said third and fourth branches to the other input of said differential amplifier; whereby DC bias voltage and a detection output from said ratio detector are applied to said differential amplifier.

References Cited (Backward Citations)

US3482176A Cited
US3444477A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-11-22 1975-05-24 1975-11-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-11-22 1979-05-24 1979-11-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-11-22 1983-05-24 1983-11-23 $7700.00 Window Closed / Lapsed

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