US3605015A
Expired / Lapsed
US
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Method and apparatus for determining deep impurity concentration in semiconductors
Assignee: AT&T Inc
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Filing: 1970-01-19
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Granted: 1971-09-14
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Expires: 1990-01-19
Abstract
Abstract The deep impurity concentration of a semiconductor is determined by forming a diode region in the wafer, applying a reverse-bias voltage across the diode, applying a first alternating current to the diode, deriving a second alternating current from the diode, and determining the phase difference of the first and second currents, said difference being proportional to the concentration of deep impurity levels at the edge of the depletion layer. In a preferred embodiment, the phase shift of the second harmonic frequency is used to determine deep level concentration.
Inventors
- 👤 John Alexander Copeland
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 15:21
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/26; G01R31/2607; G01R31/2637; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49004
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
58 words
The process of claim 1 wherein: the second current is a second harmonic of the first current; and the step of determining the phase difference comprises the steps of generating a third alternating current from the first current which is a second harmonic of the first current, and directing the second and third currents to a phase detector.
Claim 2
Dependent Claim
53 words
The process of claim 2 further comprising the steps of: deriving a first harmonic voltage of frequency f from the diode region; and determining the thickness of the depletion layer comprising the step of measuring the amplitude of the first harmonic voltage, said amplitude being indicative of the thickness of the depletion layer.
Claim 3
Dependent Claim
61 words
The process of claim 3 further comprising the steps of: changing the bias voltage across the diode region, thereby varying the thickness of the depletion layer; and successively deriving and measuring said first harmonic voltage and said phase difference of the second and third currents, thereby giving indications of the concentration of deep impurity levels at different depths in the wafer.
Claim 4
Dependent Claim
99 words
In a process for evaluating a semiconductor wafer having an electronic barrier diode region comprising the steps of applying a reverse-bIas voltage across the diode region to form a depletion layer, applying alternating current of frequency f to the diode region, deriving a second harmonic voltage of frequency 2f from the diode region, and determining the doping density at an edge of the depletion layer by measuring the amplitude of the second harmonic voltage, the improvement comprising: determining the relative phase of the second harmonic voltage, thereby to determine the density of deep impurity levels in the depletion layer.
Claim 5
Dependent Claim
49 words
The improvement of claim 5 wherein the determining step comprises the steps of doubling the frequency of the alternating current of frequency f to generate a reference signal of frequency 2f, and directing the reference signal and second harmonic voltage derived from the diode region to a phase detector.
Claim 6
Dependent Claim
121 words
In apparatus for evaluating semiconductor wafers which include a diode region comprising means for applying a reverse-bias voltage across the diode region to establish a depletion layer, means for applying alternating current of frequency f to the diode region, means for deriving a second harmonic voltage of frequency 2f from the diode region, and means for measuring the amplitude of the second harmonic voltage, said amplitude being indicative of the doping density at the edge of the depletion layer, the improvement comprising: means for determining the phase shift of the second harmonic voltage derived from the diode with respect to applied alternating current, said difference being indicative of the concentration of deep impurity levels at the edge of the depletion layer.
References Cited (Backward Citations)
US2942329A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-09-13 | 1975-03-15 | 1975-09-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-09-13 | 1979-03-15 | 1979-09-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-09-13 | 1983-03-15 | 1983-09-14 | $7700.00 | Window Closed / Lapsed |