Abstract A drive system for a magnetic core array is disclosed which employs transistor switches for selectively applying the energizing currents to the drive lines. The transistor switches are in the form of floating, nonsaturating switches of the type disclosed in U.S. Pat. No. 3,289,008. The secondary windings of power supply transformers provide the sole source of energizing current for the drive lines. This isolates the drive lines from the direct current power supplies thereby minimizing the coupling of currents from the drive lines to the sense lines. The selected transistor switches are turned on to complete series circuits through their respective drive lines prior to application of a square wave voltage pulse applied to the drive lines by the pulse or power transformers. The voltage pulse provided by the power supply transformer is removed a short time prior to the turning off of the transistors. This eliminates the transistor breakdown problem and affords a significant reduction in power consumption. Each transistor switch is used for both read and write operations. This is accomplished by providing isolation diodes which are back biased by the power supply transformers to isolate the commoned collectors and emitters of the switching transistors and thereby prevent current flow in an undesired path. There is thus afforded a substantial reduction in the number of transistors and coupling transformers required in the drive system.
In a memory array including bistable memory elements arranged in rows and columns, row and column drive lines threading the memory elements for selectively addressing them within the array, electronic switch means operable to selectively establish series circuits through the switch means and drive lines for the application of bipolar read and write currents to the drive lines to enter binary data into and read binary data from the memory elements, and transformer means including secondary winding means connected to opposite ends of the series circuits formed by the switch means and the drive lines and constituting the sole source of energizing current for said drive lines, the improvement wherein at least one of said switch means is an individual switch used to establish series circuits during both the write and the read cycles, and further comprising isolation means connected to said individual switch to permit the energizing current to flow in a first direction through drive lines connected to said switch while blocking current flow in an undesired path during the write cycle, and to permit the energizing current to flow in the opposite direction through said drive lines while blocking current flow in an undesired path during the read cycle.
Claim 2
Dependent Claim
202 words
In a memory array including bistable memory elements arranged in rows and columns, row and column drive lines threading the memory elements for selectively addressing them within the array, electronic switch means operable to selectively establish series circuits through the switch means and drive lines for the application of bipolar read and write currents to the drive lines to enter binary data into and read binary data from the memory elements, and transformer means including secondary winding means connected to opposite ends of the series circuits formed by the switch means and the drive lines and constituting the sole source of energizing current for said drive lines, the improvement wherein at least one of said switch means is an individual switch used to establish series circuits during both the write and the read cycles, and further comprising isolation means connected to said individual switch to permit the energizing current to flow in a first direction through drive lines connected to said switch while blocking current flow in an undesired path during the write cycle, and to permit the energizing current to flow in the opposite direction through said drive lines while blocking current flow in an undesired path during the read cycle.
Claim 3
Dependent Claim
70 words
A memory array as recited in claim 1 wherein: a. each individual switch is a transistor, b. the secondary winding means includes a read winding and a write winding, c. the isolation means includes a first diode connected to the emitter of each transistor and a second diode connected to the collector of each transistor, and d. means connecting the read and write windings to opposite diodes in each transistor.