← Back to Patent Explorer
US3601807A Expired / Lapsed US ⏱️ 0.0 years remaining

Centralized crosspoint switching unit

Assignee: International Business Machines Corp
•
Filing: 1969-01-13
•
Granted: 1971-08-24
•
Expires: 1989-01-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An input/output interface switching apparatus for switching I/O interfaces connecting I/O control units between channels. A matrix of transistor cross-point switches is provided for attaching one or more strings of control units to one or more channels. These strings of control unit are switched between the channels under configuration control. The cross-points are arranged so that a single failure within one interface affects at most only the channel to which the interface is associated. The switching matrix is physically centralized to minimize the number of I/O interface cables and connectors. The switching functions are, however, logically decentralized from a reliability standpoint so that a single component failure does not result in total switching system failure.

Inventors

  • 👤 William F Beausoleil
  • 👤 Wilbur D Pricer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-22 20:59
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/38; G06F13/40; G06F13/4004; G06F13/4022

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 150 words
A crosspoint switch matrix for connecting a plurality of sending lines to a plurality of receiving lines which lines are energizable to carry direct current DC voltage levels of a DC interlocked demand-response interface comprising: a plurality of transistors, one of each of a pair of sending and receiving lines, each transistor having its collector connected to a sending line and its emitter connected to a receiving line, switch control means for causing a sending line to be electrically connected to a receiving line, which includes means for supplying a current to the base of the one of said plurality of transistors which is common to said sending line and said receiving line, which current is of sufficient magnitude to drive said transistor into saturation; means for energizing said sending line with a DC signal, and means terminating said receiving line in a circuit providing a direct current return path.
Claim 2
Dependent Claim 150 words
A crosspoint switch matrix for connecting a plurality of sending lines to a plurality of receiving lines which lines are energizable to carry direct current DC voltage levels of a DC interlocked demand-response interface comprising: a plurality of transistors, one of each of a pair of sending and receiving lines, each transistor having its collector connected to a sending line and its emitter connected to a receiving line, switch control means for causing a sending line to be electrically connected to a receiving line, which includes means for supplying a current to the base of the one of said plurality of transistors which is common to said sending line and said receiving line, which current is of sufficient magnitude to drive said transistor into saturation; means for energizing said sending line with a DC signal, and means terminating said receiving line in a circuit providing a direct current return path.
Claim 3
Dependent Claim 48 words
The combination according to claim 1 wherein said switch control means is connected to said sending lines and is responsive to selection signals transmitted over said sending lines to thereby cause a sending line to be electrically connected to a receiving line in response to said selection signals.
Claim 4
Dependent Claim 241 words
A crosspoint switch matrix for connecting a first plurality of sending lines and receiving lines to a second plurality of sending and receiving lines, sending lines connecting to corresponding receiving lines and forming a pair of sending and receiving lines, said lines adapted to carry control signals, comprising: a plurality of transistors, one for each of said pair of sending and receiving lines, each transistor having its collector connected to a sending line of said first plurality and its emitter connected to a receiving line of said second plurality, or having its collector connected to a sending line of said second plurality and its emitter connected to a receiving line of said first plurality, and switch control means connected to said sending and receiving lines of said first plurality of lines responsive to signals transmitted over said first plurality of sending and receiving lines for causing said sending and receiving lines of said first plurality of sending and receiving lines to be electrically connected to said second plurality of sending and receiving lines, which switch control means includes direct out signal means for supplying a drive signal of a first polarity to the bases of said plurality of transistors, the minimum amplitude of said first polarity drive signal being that which is sufficient to supply a maximum base current which maintains said transistor in saturation during the propagation of a minimum voltage level of control signals appearing on said sending lines.
Claim 5
Dependent Claim 241 words
A crosspoint switch matrix for connecting a first plurality of sending lines and receiving lines to a second plurality of sending and receiving lines, sending lines connecting to corresponding receiving lines and forming a pair of sending and receiving lines, said lines adapted to carry control signals, comprising: a plurality of transistors, one for each of said pair of sending and receiving lines, each transistor having its collector connected to a sending line of said first plurality and its emitter connected to a receiving line of said second plurality, or having its collector connected to a sending line of said second plurality and its emitter connected to a receiving line of said first plurality, and switch control means connected to said sending and receiving lines of said first plurality of lines responsive to signals transmitted over said first plurality of sending and receiving lines for causing said sending and receiving lines of said first plurality of sending and receiving lines to be electrically connected to said second plurality of sending and receiving lines, which switch control means includes direct out signal means for supplying a drive signal of a first polarity to the bases of said plurality of transistors, the minimum amplitude of said first polarity drive signal being that which is sufficient to supply a maximum base current which maintains said transistor in saturation during the propagation of a minimum voltage level of control signals appearing on said sending lines.
Claim 6
Dependent Claim 37 words
The combination according to claim 3 wherein the maximum voltage amplitude of said first polarity drive signal is limited to the amount of allowable voltage shift of said control signals caused by base current in said transistor.
Claim 7
Dependent Claim 53 words
The combination according to claim 3 wherein said direct out signal means includes means for supplying a drive signal of a polarity opposite to said first polarity to said bases of said plurality of transistors and of an amplitude sufficient to minimize crosstalk between pairs of sending and receiving lines through nonenergized crosspoints.
Claim 8
Dependent Claim 53 words
The combination according to claim 4 wherein said direct out signal means includes means for supplying a drive signal of a polarity opposite to sAid first polarity to said bases of said plurality of transistors and of an amplitude sufficient to minimize crosstalk between pairs of sending and receiving lines through nonenergized crosspoints.
Claim 9
Dependent Claim 223 words
Switching apparatus for switchably connecting a first group of control lines connected to a controlling module to one of a plurality of controlled modules, having a second group of control lines connected thereto, said control lines including sending lines energizable by signal sources at said modules and receiving lines for receiving control signals sent on corresponding sending lines, each sending and receiving line of said first group paired with receiving and sending lines respectively of said second group comprising: a plurality of transistors, one for each of a pair of sending and receiving lines, each transistor having its collector connected to a sending line and its emitter connected to a receiving line, and switch control means associated with said controlling module for causing sending and receiving lines in said first group to be electrically connected to selected receiving and sending lines in said second group of said one of said controlled modules, which control means includes direct out signal means for supplying a drive signal of a first polarity to the bases of a plurality of transistors of said selected lines; the minimum amplitude of said first polarity drive signal being that which is sufficient to supply a maximum base current which maintains said transistor in saturation during the propagation of a minimum voltage level of control signals appearing on said sending lines.
Claim 10
Dependent Claim 223 words
Switching apparatus for switchably connecting a first group of control lines connected to a controlling module to one of a plurality of controlled modules, having a second group of control lines connected thereto, said control lines including sending lines energizable by signal sources at said modules and receiving lines for receiving control signals sent on corresponding sending lines, each sending and receiving line of said first group paired with receiving and sending lines respectively of said second group comprising: a plurality of transistors, one for each of a pair of sending and receiving lines, each transistor having its collector connected to a sending line and its emitter connected to a receiving line, and switch control means associated with said controlling module for causing sending and receiving lines in said first group to be electrically connected to selected receiving and sending lines in said second group of said one of said controlled modules, which control means includes direct out signal means for supplying a drive signal of a first polarity to the bases of a plurality of transistors of said selected lines; the minimum amplitude of said first polarity drive signal being that which is sufficient to supply a maximum base current which maintains said transistor in saturation during the propagation of a minimum voltage level of control signals appearing on said sending lines.
Claim 11
Dependent Claim 37 words
The combination according to claim 7 wherein the maximum voltage amplitude of said first polarity drive signal is limited to the amount of allowable voltage shift of said control signals caused by base current in said transistor.
Claim 12
Dependent Claim 53 words
The combination according to claim 7 wherein said direct out signal means includes means for supplying a drive signal of a polarity opposite to said first polarity to said bases of said plurality of transistors and of an amplitude sufficient to minimize crosstalk between pairs of sending and receiving lines through nonenergized crosspoints.
Claim 13
Dependent Claim 53 words
The combination according to claim 8 wherein said direct out signal means includes means for supplying a drive signal of a polarity opposite to said first polarity to said bases of said plurality of transistors and of an amplitude sufficient to minimize crosstalk between pairs of sending and receiving lines through nonenergized crosspoints.

References Cited (Backward Citations)

US3105224A Cited
US3354321A Cited
US3402392A Cited
US3489856A Cited
US3495217A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-08-23 1975-02-22 1975-08-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-08-23 1979-02-22 1979-08-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-08-23 1983-02-22 1983-08-24 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag