Cable receiver

Claim 2

A bidirectional receiver adapted to receive serially coded messages wherein the receiver input circuit is connected in series with a transmission circuit which extends from a central station to a series of remote stations and on which circuit messages are transmitted in both directions and received from either direction at the receiver, said receiver comprising: input circuit means having an input and two outputs wherein a first signal on said input provides an output signal at one of said two outputs upon a termination of said first signal an output signal is developed at the other of said two outputs, a first receiver channel including a control circuit and an output circuit, said input circuit means one output being connected in controlling relation to said control circuit so that upon the reception of a message pulse from a first direction on said transmission circuit said first channel provides an output signal indicative thereof; a second receiver channel including a control circuit and an output circuit, said input circuit means other output being connected in controlling relation to said control circuit so that upon the reception of a message pulse from the opposite Direction on said transmission circuit said second channel provides an output signal indicative thereof, controllable second-channel-disabling means controlled in response to the presence of a message pulse at said first receiver channel to disable said second receiver channel, and controllable first-channel-disabling means controlled in response to the presence of a message pulse at said second receiver channel to disable said first receiver channel.

Claim 3

The receiver according to claim 1 wherein said first receiver channel comprises a first normally nonconductive transistor having a control electrode in said control circuit and current-switching electrodes connected in said output circuit, so that upon said reception of said message pulse from said first direction said first transistor is rendered conductive to conduct current through said switching electrodes and provide said output signal, and wherein said second receiver channel comprises a second normally nonconductive transistor having a control electrode in said control circuit and current-switching electrodes connected in said output circuit so that upon said reception of said message pulse from said opposite direction said second transistor is rendered conductive to conduct current through said switching electrode and provide said output signal.

Claim 4

The receiver according to claim 2 wherein said controllable first-channel-disabling means comprises a first current-inhibiting gate having a normally conducting condition and being operated to an inhibit condition in response to said presence of said message pulse at said second receiver channel, said gate being connected in series with said first transistor current-switching electrodes, and said controllable second-channel-disabling means comprises a second current-inhibiting gate having a normally conducting condition and being operated to an inhibit condition in response to said presence of said message pulse at said first receiver channel, said gate being connected in series with said second transistor current-switching electrodes.

Claim 5

The receiver according to claim 3 and further comprising said first-channel-disabling means a buffer stage connecting a signal at said second receiver channel to said first current-inhibiting gate, and in said second-channel-disabling means another buffer stage connecting a signal at said first receiver channel to said second current-inhibiting gate.

Claim 6

The receiver according to claim 1 wherein said disabling means further includes delay means to prolong the disabling beyond the termination of said message pulse.

Claim 7

The receiver according to claim 1 and further comprising as an output circuit a combining gate, the first channel output signal and the second channel output signal being connected to the combining gate inputs to give a common output.

Claim 8

A two-channel pulse receiver comprising: input transformer means including a primary winding having first and second terminals, said first terminal adapted to be connected to a transmission line from a first location and said second terminal adapted to be connected to a transmission line from a second location, said transformer means also including secondary winding means having first and second terminals, a first channel comprising; normally nonconductive first current-switching means having a control electrode and a pair of current-carrying electrodes, said secondary winding means first terminal being connected to said control electrode in controlling relation thereto, normally conductive second current-switching means having a control electrode and a pair of current-carrying electrodes, said control electrode normally biased to conduction, said current-carrying electrodes of said first and second switching means being connected in series with each other and in series with first impedance means to a source of electrical power, an output circuit from the junction of said first impedance means and said switching means; a seconD channel comprising; normally nonconductive third current-switching means having a control electrode and a pair of current-carrying electrodes, said secondary winding means second terminal being connected in controlling relation to said control electrode; normally nonconductive fourth current-switching means having a control electrode and a pair of current-carrying electrodes normally biased to conduction, said current-carrying electrodes of said third and fourth switching means being connected in series with each other and in series with second impedance means to said source; an output circuit from the junction of said second impedance means and said switching means; a first inhibit circuit connected from said first channel output circuit to said control electrode of said normally conductive fourth switching means and effective to turn off said fourth switching means and thus disable said second channel during the transmission of a pulse in said first channel; and a second inhibit circuit connected from said second channel output circuit to said control electrode of said normally conductive second current-switching means and effective to turn off said second switching means and thus disable said first channel during the transmission of a pulse in said second channel.

Claim 9

A two-channel pulse receiver comprising: input transformer means including a primary winding having first and second terminals, said first terminal adapted to be connected to a transmission line from a first location and said second terminal adapted to be connected to a transmission line from a second location, said transformer means also including secondary winding means having first and second terminals, a first channel comprising; normally nonconductive first current-switching means having a control electrode and a pair of current-carrying electrodes, said secondary winding means first terminal being connected to said control electrode in controlling relation thereto, normally conductive second current-switching means having a control electrode and a pair of current-carrying electrodes, said control electrode normally biased to conduction, said current-carrying electrodes of said first and second switching means being connected in series with each other and in series with first impedance means to a source of electrical power, an output circuit from the junction of said first impedance means and said switching means; a seconD channel comprising; normally nonconductive third current-switching means having a control electrode and a pair of current-carrying electrodes, said secondary winding means second terminal being connected in controlling relation to said control electrode; normally nonconductive fourth current-switching means having a control electrode and a pair of current-carrying electrodes normally biased to conduction, said current-carrying electrodes of said third and fourth switching means being connected in series with each other and in series with second impedance means to said source; an output circuit from the junction of said second impedance means and said switching means; a first inhibit circuit connected from said first channel output circuit to said control electrode of said normally conductive fourth switching means and effective to turn off said fourth switching means and thus disable said second channel during the transmission of a pulse in said first channel; and a second inhibit circuit connected from said second channel output circuit to said control electrode of said normally conductive second current-switching means and effective to turn off said second switching means and thus disable said first channel during the transmission of a pulse in said second channel.

Claim 10

The invention in accordance with claim 7 wherein said first and second inhibit circuits each comprise a buffer stage.

Claim 11

The invention in accordance with claim 7 wherein said first and second inhibit circuits each further include delay means to prolong the disabling beyond the termination of said pulse.

Claim 12

The invention in accordance with claim 7 and further comprising as an output circuit a two-input-combining gate, the first channel output circuit and second channel output circuit being connected to the first and second inputs, respectively, to give a common output.