Analog-digital converters

Claim 2

Apparatus for converting a slow time-varying input signal into a time interval which represents the magnitude of said input signal comprising, an operational amplifier having an input for receiving the input signal and an output, a nonregenerate feedback circuit coupling the amplifier output to the amplifier input, storage means in said feedback circuit, means for applying the input signal to said amplifier at least until said storage means stores a signal of magnitude proportional to the magnitude of the input signal, a source of reference signal having a polarity opposite that of said input signal and a magnitude sufficient to discharge said storage means at a constant rate to a predetermined level in a time interval which represents the magnitude of said input signal, a negative feedback resistance network coupling the amplifier output to the amplifier input and causing said amplifier to operate essentially as a DC amplifier while said storage means receives and stores said input signal, and means including a resistor for supplying the reference signal to said storage means, and for causing said amplifier to operate with said storage means as an integrator while said storage means discharges.

Claim 3

Apparatus as claimed in claim 1 which further comprises, means for timing said time interval during which said storage means discharges to provide a digital representation of the input signal magnitude.

Claim 4

Apparatus as claimed in claim 1 wherein said means for applying said reference signal to said storage means comprises, switch means coupled between the reference signal source and said amplifier input for applying said reference signal to said input when closed and for removing said reference signal from said input when opened, and means coupled to said switch means for initiating the closure of said switch means whereby said reference signal is applied to said input.

Claim 5

Apparatus as claimed in claim 3 wherein said means for initiating the closure of said switch means comprises, a device coupled to said switch means and characterized as having a stable and an unstable state and returning to said stable state a predetermined time after being in said unstable state, said device initiating closure of said switch means by returning to said stable state.

Claim 6

Apparatus as claimed in claim 4 wherein said switch means remains open for a time interval at least as long as said predetermined time, and means coupled to the amplifier output and responsive to said storage means discharging to said predetermined level for driving said device into said unstable state.

Claim 7

Apparatus as claimed in claim 3 wherein the timing means comprises, a source of clock pulses and pulse counting means for counting said clock pulses and further, wherein said switch means is coupled to said pulse counting means and closes said discharge circuit in response to a predetermined count in said counting means.

Claim 8

Apparatus as claimed in claim 6 which further comprises, means coupled to said counting means and to said device and responsive to the state of said device for terminating pulse counting by said counting means while said device is in said unstable state.

Claim 9

Apparatus as claimed in claim 7 which further comprises, means coupled to said counting means for displaying a number representative of the count in said counting means, said predetermined time of said device being selected so that while pulse counting by said counting means is terminated the number displayed by the displaying means persists long enough to be determined visually.

Claim 10

An analog-digital converter comprising, a DC amplifier characterized as having high gain and an input and an output, negative feedback means coupling the amplifier output to the amplifier input and including an integrating capacitor and first resistor means in parallel with said capacitor, means for charging said capacitor to a value proportional to the analog signal magnitude, a source of reference signal of greater magnitude than, and of opposite polarity to, said analog signal for discharging said capacitor to a predetermined level, second resistor means coupled to said amplIfier input, means for applying the reference signal through said second resistor means to said amplifier input when said capacitor attains said value, whereby said capacitor discharges from said value upon the application of said reference signal to said resistor means, and means for timing the discharging of said capacitor to said level to provide a digital representation of the analog signal magnitude, the time required to discharge said capacitor to said level being a function of the first and second resistor means.

Claim 11

An analog-digital converter comprising, a DC amplifier characterized as having high gain and an input and an output, negative feedback means coupling the amplifier output to the amplifier input and including an integrating capacitor and first resistor means in parallel with said capacitor, means for charging said capacitor to a value proportional to the analog signal magnitude, a source of reference signal of greater magnitude than, and of opposite polarity to, said analog signal for discharging said capacitor to a predetermined level, second resistor means coupled to said amplIfier input, means for applying the reference signal through said second resistor means to said amplifier input when said capacitor attains said value, whereby said capacitor discharges from said value upon the application of said reference signal to said resistor means, and means for timing the discharging of said capacitor to said level to provide a digital representation of the analog signal magnitude, the time required to discharge said capacitor to said level being a function of the first and second resistor means.

Claim 12

The converter as claimed in claim 9 wherein said second resistor means comprises a resistor coupled to the amplifier input end of said first resistor means.

Claim 13

The converter as claimed in claim 9 wherein said second resistor means is in series with said first resistor and said reference signal is applied to a junction common to both resistors.

Claim 14

The converter as claimed in claim 9 wherein said second resistor means comprises, a resistance network formed of at least three interconnected resistors and further wherein a second capacitor is coupled to a junction common to two of said resistors and to a second source of reference potential.

Claim 15

Analog-digital converter comprising, an operational amplifier having an input and output, negative feedback circuit means coupling the amplifier output to the amplifier input, said feedback means comprising an integrating capacitor and at least two resistors, a first resistor in parallel with said capacitor and a second resistor having two ends, one end of said second resistor being coupled to said amplifier input, a source of reference signal of greater magnitude than the analog input signal and of opposite polarity with respect thereto, switch means having respective open and closed states coupled between the reference source and the other end of said second resistor, said amplifier operating essentially as a DC amplifier to an analog signal applied to the input thereof and said capacitor storing the resulting amplifier output potential when said switch means is open, said capacitor being discharged at a substantially constant rate to a predetermined level by said reference signal when said switch means is closed, means for closing said switch means, and digital means for timing the interval during which said capacitor is discharged to said predetermined level to provide a digital representation of the analog signal magnitude, said time interval being proportional to the product of the resistance value of said second resistor and the capacitance value of said capacitor.

Claim 16

Analog-digital converter comprising, an operational amplifier having an input and output, negative feedback circuit means coupling the amplifier output to the amplifier input, said feedback means comprising an integrating capacitor and at least two resistors, a first resistor in parallel with said capacitor and a second resistor having two ends, one end of said second resistor being coupled to said amplifier input, a source of reference signal of greater magnitude than the analog input signal and of opposite polarity with respect thereto, switch means having respective open and closed states coupled between the reference source and the other end of said second resistor, said amplifier operating essentially as a DC amplifier to an analog signal applied to the input thereof and said capacitor storing the resulting amplifier output potential when said switch means is open, said capacitor being discharged at a substantially constant rate to a predetermined level by said reference signal when said switch means is closed, means for closing said switch means, and digital means for timing the interval during which said capacitor is discharged to said predetermined level to provide a digital representation of the analog signal magnitude, said time interval being proportional to the product of the resistance value of said second resistor and the capacitance value of said capacitor.

Claim 17

The converter as claimed in claim 13 which further comprises, level detection means responsive to said capacitor discharging to said predetermined level for opening said switch means.

Claim 18

The converter as claimed in claim 14 which further comprises means coupled to said level detection means and to said switch means for holding said switch means open after said capacitor discharges to said predetermined level and at least until said capacitor stores a potential proportional to said analog input signal magnitude.

Claim 19

The converter as claimed in claim 13 wherein said means for closing said switch means comprises, a monostable device having respective stable and unstable states and switching to said unstable state in response to said capacitor discharging to said predetermined level, said device maintaining said switch means open at least while said device remains in said unstable state, the time interval during which said device remains in said unstable state being sufficient to permit said capacitor to store a voltage proportional to the magnitude of the analog signal received at said amplifier input.

Claim 20

The converter as claimed in claim 16 wherein the digital means comprises, a source of clock pulses and pulse counting means for counting the clock pulses, and means coupled to said device, to said pulse counting means and said clock pulse source, and responsive to the state of said device, for blocking the flow of clock pulses to said counting means while said device is in said unstable state, whereby said counting means stabilizes at a count equivalent to the magnitude of the analog signal.

Claim 21

The converter as claimed in claim 13 wherein the analog signal is received by said amplifier input from an analog signal source and which further comprises, second switch means coupled between said analog signal source and said amplifier input for decoupling said analog signal source from said amplifier input while said capacitor is discharging.

Claim 24

The converter as claimed in claim 19 wherein the amplifier input end of said first resistor and said one end of said second resistor form a common current-summing junction with a terminal at said amplifier input.

Claim 25

The converter as claimed in claim 20 which further comprises a second capacitor having one side connected to a source of constant potential, and resistance means in parallel with said second resistor and coupled to the other side of said second capacitor, the values of said second capacitor and said resistance means being such as to compensate for nonlinearities in said time integration.