Triple integrating ramp analog-to-digital converter

Claim 2

Analog-to-digital conversion apparatus for converting an analog signal of unknown magnitude into a digital representation of the magnitude of said signal comprising in combination: means for receiving said analog signal of unknown magnitude; reference signal generating means for generating a plurality of reference signals; integrating means; control means for introducing said analog signal to said integrating means for a fixed time period and for storing the integrated value of said analog signal, said control means including means for sequentially introducing and removing each of said reference signals to said integrating means; and means for measuring the total time required for the integrated value of said sequentially applied reference signals to acquire a magnitude related to the stored integrated value of said analog signal; whereby said total time represents the digital magnitude of said analog signal.

Claim 3

Analog-to-digital conversion apparatus of tee type set forth in claim 1 wherein said measuring means includes a counter having a plurality of groups operable during the integration of a respective said reference signal, said apparatus further including, means for sensing that the output of said integrating means exceeds at least one preselected transition level, and for producing an output whenever said integrating means output passes said transition level. said control means being responsive to said sensing means output for selectively switching said reference signals relative to said integrating means.

Claim 4

Analog-to-digital conversion apparatus of the type set forth in claim 2 including: means for generating a plurality of clock pulses; and gating means for gating said clock pulses into the said group of said counter associated with the said reference signal being integrated by said integrating means.

Claim 5

Analog-to-digital conversion apparatus of the type set forth in claim 3 wherein: said reference signal generating means generates first and second reference signals, said counter includes first and second groups associated with said first and second reference signals respectively; said apparatus further including means for generating a carry pulse when said second group of positions is full; and means for summing said carry pulse from said second group to said first group.

Claim 6

Analog-to-digital conversion apparatus of the type set forth in claim 4 wherein said integrating means generates output signals and said sensing means include a plurality of comparator means, each of said comparator means serving to compare said output signals of said integrating means to different predetermined levels, and each said comparator means generating comparator output signals upon noting an equality between said signals of said integrating means and one said predetermined level.

Claim 7

Analog-to-digital conversion apparatus of the type set forth in claim 5 wherein each of said groups comprises bit positions and each of said bit positions can be in one of two states; and further comprising; means for selectively switching said analog signal and said reference signals to said integrating means; and said control means being responsive to said comparator output signals and to the state of said bit positions, said control means generating control signals at least for first energizing said switching means connecting said analog signal generating means to said integrating means, for then energizing said switching means connecting said (a) first of said reference signals to said integrating means, and subsequently for energizing said switching means connecting said (a) second of said reference signals to said integrating means.

Claim 8

Analog-to-digital conversion apparatus of the Type set forth in claim 6 wherein said comparator means includes first and second comparator circuits, said first comparator circuit generating one said comparator output signal when the output of said integrating means passes a first predetermined voltage level, and said second comparator circuit providing another said comparator output signal when said output of said integrating means passes through a second predetermined voltage level.

Claim 9

Analog-to-digital conversion apparatus comprising in combination: means for receiving an analog signal; means for generating a digital representation of said analog signal; said last-mentioned means having at least a first and second group of bit positions; means for integrating said analog signal over a fixed period of time, thereby generating a first ramp voltage; means for storing said integrated analog signal; means for generating a first reference signal; means for integrating said first reference signal thereby generating a second ramp voltage of polarity opposite to the polarity of said first ramp voltage and for reducing said stored integrated signal thereby; means for generating clock signals; means for entering said clock signals into said first group of bit positions during integration of said first reference signal; means for generating a second reference signal; means for integrating said second reference signal thereby generating a third ramp voltage of polarity opposite that of said first ramp voltage, and for further reducing said stored integrated signal thereby; means for entering said clock signals into said second group of bit positions during integration of said second reference signal, thereby generating a digital representation of said analog signal.

Claim 10

Analog-to-digital conversion apparatus comprising in combination: means for receiving an analog signal; means for generating a digital representation of said analog signal; said last-mentioned means having at least a first and second group of bit positions; means for integrating said analog signal over a fixed period of time, thereby generating a first ramp voltage; means for storing said integrated analog signal; means for generating a first reference signal; means for integrating said first reference signal thereby generating a second ramp voltage of polarity opposite to the polarity of said first ramp voltage and for reducing said stored integrated signal thereby; means for generating clock signals; means for entering said clock signals into said first group of bit positions during integration of said first reference signal; means for generating a second reference signal; means for integrating said second reference signal thereby generating a third ramp voltage of polarity opposite that of said first ramp voltage, and for further reducing said stored integrated signal thereby; means for entering said clock signals into said second group of bit positions during integration of said second reference signal, thereby generating a digital representation of said analog signal.

Claim 11

Analog-to-digital conversion apparatus of the type set forth in claim 8 and comprising in addition: means for generating a carry pulse when said second group of bit positions is full; and means for summing said carry pulse from said second group of bit positions to said first group of bit positions.

Claim 12

Analog-to-digital conversion apparatus wherein an analog signal of unidentified magnitude is converted to a digital number representing the magnitude of said analog signal, comprising in combination: digital number storing means for storing said digital number; means for generating a first voltage representing the time integral of said analog signal over a fixed time period, said time integral being defined as a first time integral; means for storing said first time integral of said analog signal; means for generating a plurality of reference signals; means for integrating said reference signals; means for generating a second voltage representing the reduction of said first time integral by the time integral of one said reference signal; pulse generating means for generating a plurality of constant frequency pulses; means for entering a first plurality of said pulses into said digital number storing means during said reduction of said first time integral by the time integral of one said reference signal; means for generating a third voltage representing the further reduction of said first time integral by the time integral of another of said reference signals; and means for entering a second plurality of said pulses into said digital number storing means during said further reduction of said first time integral, thereby completing the conversion of said analog signal to said digital number.

Claim 13

Analog-to-digital conversion apparatus wherein an analog signal of unidentified magnitude is converted to a digital number representing the magnitude of said analog signal, comprising in combination: digital number storing means for storing said digital number; means for generating a first voltage representing the time integral of said analog signal over a fixed time period, said time integral being defined as a first time integral; means for storing said first time integral of said analog signal; means for generating a plurality of reference signals; means for integrating said reference signals; means for generating a second voltage representing the reduction of said first time integral by the time integral of one said reference signal; pulse generating means for generating a plurality of constant frequency pulses; means for entering a first plurality of said pulses into said digital number storing means during said reduction of said first time integral by the time integral of one said reference signal; means for generating a third voltage representing the further reduction of said first time integral by the time integral of another of said reference signals; and means for entering a second plurality of said pulses into said digital number storing means during said further reduction of said first time integral, thereby completing the conversion of said analog signal to said digital number.

Claim 14

Analog-to-digital conversion apparatus of the type set forth in claim 10 wherein said digital number storing means is partitioned into at least a first group of bit positions and a second group of bit positions and said analog-to-digital conversion apparatus comprises in addition: means for gating said first plurality of pulses into said first group of bit positions; and means for gating said second plurality of pulses into said second group of bit positions.

Claim 15

Analog-to-digital conversion apparatus of the type set forth in claim 11 wherein said digital number storing means comprises a binary counter, said first group of bit positions comprises the higher order positions of said binary counter, and said second group of bit positions comprises the lower order bit positions of said binary counter.

Claim 16

Analog-to-digital conversion apparatus of the type set forth in claim 12 wherein said gating means includes a plurality of comparator means, one said comparator means comparing said second voltage to one predetermined level and another said comparator means comparing said third voltage to another predetermined level.

Claim 17

Analog-to-digital conversion apparatus wherein an analog signal of unidentified magnitude is converted to a digital number representing the magnitude of said analog signal, comprising in combination: digital number storing means for storing said digital number; means for generating a first voltage representing the time integral of said analog signal over a fixed time period, said time integral being defined as a first time integral; means for storing said first time integral of said analog signal; means for generating a plurality of reference signals; means for generating a second voltage representing the time integral of one said reference signal, said last-mentioned time integral being defined as a second time integral; means for subtracting said second time integral from said first time integral, thereby generating a difference integral; pulse generating means for generating a plurality of constant frequency pulses; means for entering a first plurality of said pulses into said digital number storing means during subtraction of said second time integral from said first time integral; means for generating a third voltage representing the time integral of another of said reference signals, said last-mentioned time integral being defined as a third time integral; means for subtracting said third time integral from said first difference integral; and means for entering a second plurality of said pulses into said digital number storing means thereby completing the conversion of said analog signal to said digital number.

Claim 18

Analog-to-digital conversion apparatus wherein an analog signal of unidentified magnitude is converted to a digital number representing the magnitude of said analog signal, comprising in combination: digital number storing means for storing said digital number; means for generating a first voltage representing the time integral of said analog signal over a fixed time period, said time integral being defined as a first time integral; means for storing said first time integral of said analog signal; means for generating a plurality of reference signals; means for generating a second voltage representing the time integral of one said reference signal, said last-mentioned time integral being defined as a second time integral; means for subtracting said second time integral from said first time integral, thereby generating a difference integral; pulse generating means for generating a plurality of constant frequency pulses; means for entering a first plurality of said pulses into said digital number storing means during subtraction of said second time integral from said first time integral; means for generating a third voltage representing the time integral of another of said reference signals, said last-mentioned time integral being defined as a third time integral; means for subtracting said third time integral from said first difference integral; and means for entering a second plurality of said pulses into said digital number storing means thereby completing the conversion of said analog signal to said digital number.