← Back to Patent Explorer
US3576478A Expired / Lapsed US ⏱️ 0.0 years remaining

Igfet comprising n-type silicon substrate, silicon oxide gate insulator and p-type polycrystalline silicon gate electrode

Assignee: Lanteris Space LLC
•
Filing: 1969-07-22
•
Granted: 1971-04-27
•
Expires: 1989-07-22
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Insulated Gate Field Effect Transistor employing a polycrystalline semiconductor surface layer, one strip of which serves as the gate electrode of the IGFET, and another strip of which may serve as a resistor. The semiconductor surface layer is employed as a mask for the diffusion of the source and drain regions, thereby insuring automatic alignment between the gate electrode and the source and drain regions.

Inventors

  • 👤 Boyd G Watkins
  • 👤 Michael J Selser

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 04:21
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/40; H10D; H10D99/00; H10P; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/02; Y10S148/043; Y10S148/053; Y10S148/106; Y10S148/122; Y10S148/136

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 118 words
The structure of claim 1 further including a resistor formed over said surface at a location spaced from said gate electrode and said source and drain regions, said resistor comprising (a) a polycrystalline layer of silicon, (b) a pair of contacts positioned at spaced locations on said layer, said silicon layer of said resistor being configured so as to provide a predetermined resistance between said pair of contacts, and (c) a layer of a silicon oxide, surrounding and contiguous said silicon layer of said resistor and having a thickness sufficient to insulate said silicon layer of said resistor from said wafer and to enable said silicon layer of said resistor to serve as a crossunder in said structure.
Claim 2
Dependent Claim 33 words
A structure according to claim 2, wherein said silicon oxide of said film and said silicon oxide of said layer surrounding and contiguous said silicon layer of said resistor are both silicon dioxide.
Claim 3
Dependent Claim 38 words
The structure of claim 2 further including a layer of a silicon oxide positioned over said gate electrode, said polycrystalline layer of silicon of said resistor being an elongated strip with widened areas at said spaced locations thereon.
Claim 4
Dependent Claim 18 words
The structure of claim 1 further including a layer of a silicon oxide positioned over said gate electrode.
Claim 5
Dependent Claim 71 words
The structure of claim 1 wherein said source and drain regions are shaped and located so that the portion of said surface of said wafer between said source and drain regions is elongated and has parallel opposing major edges, said gate electrode also being elongated and having parallel opposing major edges, the major edges of said gate electrode being parallel to the major edges of said elongated portion of said wafer.
Claim 6
Dependent Claim 13 words
A transistor according to claim 1, wherein said silicon oxide is silicon dioxide.

References Cited (Backward Citations)

US3189973A Cited
US3289093A Cited
US3355637A Cited
US3386016A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-04-26 1974-10-26 1975-04-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-04-26 1978-10-26 1979-04-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-04-26 1982-10-26 1983-04-27 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag