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US3571705A Expired / Lapsed US ⏱️ 0.0 years remaining

Analog signal amplitude distribution measuring apparatus

Assignee: RTX Corp
•
Filing: 1968-12-09
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Granted: 1971-03-23
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Expires: 1988-12-09
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Abstract

Abstract The time distribution of amplitudes of analogue signals, as well as the number of signals in excess of a given amplitude, are recorded in a plurality of electromechanical counters, each one corresponding to a range of amplitudes or a lower limit of amplitude. The amplitudes are determined by periodically comparing the analogue voltage wave form with a plurality of standard voltages, each corresponding to a boundary between the ranges of the various counters. Selectively engageable filtering is provided, and DC offset means is provided (such as for gravity compensation in an accelerometer embodiment).

Inventors

  • 👤 Bruce A Crane
  • 👤 William H Walter

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 00:14
CPC Classifications
G; G01; G01P; G01P1/00; G01P1/12; G01P1/127; G01P15/00; G01P15/02; G01P15/08; G01P15/0891

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 319 words
Analgoue voltage amplitude analysis apparatus comprising: clock means alternately providing first and second signals respectively defining first and second periods of time, cyclically in a sequence; means providing a plurality of voltage references; input means providing the absolute value of an analogue voltage, the amplitude characteristics of which are to be analyzed; storage means responsive to said clock means and said input means for responding to said input means during a period of time commensurate with a first one of said clock signals and for storing during the period of time commensurate with said second clock signal said absolute value of analogue voltage last sensed during said first clock signal; a plurality of voltage comparison means, each responsive to said storage means and to a related one of said voltage references, each providing an output signal in response to the voltage output of said storage means being in excess of the voltage of the corresponding voltage reference, said comparison means arranged in a sequence of ascending order of voltage of the related voltage references; a plurality of gate means, one for each of said comparison means, each connected to the output of the related comparison means, each responsive to the second one of said timing signals and each except the highest one in said sequence being responsive to the absence of an output from the one of said comparison means next higher in said sequence thereto, to provide an output signal; and a plurality of counters, one related to each of said compare means, each responsive to the output signal of the related gate means to increment the count thereof in response to each output signal of the related gate means, whereby each of said counters counts the incidence of signals presented to said store means having a voltage amplitude as high as the related voltage reference but not as high as the next higher reference in said sequence.
Claim 2
Dependent Claim 319 words
Analgoue voltage amplitude analysis apparatus comprising: clock means alternately providing first and second signals respectively defining first and second periods of time, cyclically in a sequence; means providing a plurality of voltage references; input means providing the absolute value of an analogue voltage, the amplitude characteristics of which are to be analyzed; storage means responsive to said clock means and said input means for responding to said input means during a period of time commensurate with a first one of said clock signals and for storing during the period of time commensurate with said second clock signal said absolute value of analogue voltage last sensed during said first clock signal; a plurality of voltage comparison means, each responsive to said storage means and to a related one of said voltage references, each providing an output signal in response to the voltage output of said storage means being in excess of the voltage of the corresponding voltage reference, said comparison means arranged in a sequence of ascending order of voltage of the related voltage references; a plurality of gate means, one for each of said comparison means, each connected to the output of the related comparison means, each responsive to the second one of said timing signals and each except the highest one in said sequence being responsive to the absence of an output from the one of said comparison means next higher in said sequence thereto, to provide an output signal; and a plurality of counters, one related to each of said compare means, each responsive to the output signal of the related gate means to increment the count thereof in response to each output signal of the related gate means, whereby each of said counters counts the incidence of signals presented to said store means having a voltage amplitude as high as the related voltage reference but not as high as the next higher reference in said sequence.
Claim 3
Dependent Claim 38 words
The apparatus according to claim 1 wherein said source means includes means for adding a DC voltage of a determinable amount and sense to said analogue voltage, whereby said means offsets the average value of said analogue voltage.

References Cited (Backward Citations)

US3125721A Cited
US2996912A Cited
US3151235A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-03-22 1974-09-21 1975-03-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-03-22 1978-09-21 1979-03-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-03-22 1982-09-21 1983-03-23 $7700.00 Window Closed / Lapsed

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